A unified framework for over-clocking linear projections on FPGAs under PVT variation

RP Duarte, CS Bouganis - … , ARC 2014, Vilamoura, Portugal, April 14-16 …, 2014 - Springer
Linear Projection is a widely used algorithm often implemented with high throughput
requisites. This work presents a novel methodology to optimise Linear Projection designs …

Fault-tolerant architecture for on-board dual-core synthetic-aperture radar imaging

H Cruz, RP Duarte, H Neto - International Symposium on Applied …, 2019 - Springer
In this research work, an on-board dual-core embedded architecture was developed for SAR
imaging systems, implementing a reduced-precision redundancy fault-tolerance …

Arc 2014 over-clocking KLT designs on FPGAs under process, voltage, and temperature variation

RP Duarte, CS Bouganis - ACM Transactions on Reconfigurable …, 2015 - dl.acm.org
Karhunen-Loeve Transformation is a widely used algorithm in signal processing that often
implemented with high-throughput requisites. This work presents a novel methodology to …

Leveraging PVT-Margins in Design Space Exploration for FPGA-based CNN Accelerators

W Lu, W Lu, J Ye, Y Hu, X Li - 2017 27th International …, 2017 - ieeexplore.ieee.org
The performance of an FPGA based CNN accelerator is determined by both parallelism and
frequency, however, most prior works optimize the parallelism in the RTL design and resolve …

Over-clocking of linear projection designs through device specific optimisations

RP Duarte, CS Bouganis - 2014 IEEE International Parallel & …, 2014 - ieeexplore.ieee.org
Frequently, applications such as image and video processing rely on implementations of the
Linear Projection algorithm with high throughput and low latency requirements. This work …

Making data center computations fast, but not so furious

D Porto, J Loff, R Duarte, L Ceze… - arXiv preprint arXiv …, 2017 - arxiv.org
We propose an aggressive computational sprinting variant for data center environments.
While most of previous work on computational sprinting focuses on maximizing the sprinting …

Variation-Aware Optimisation for Reconfigurable Cyber-Physical Systems

RP Duarte, CS Bouganis - … Innovation for Cyber-Physical Systems: 7th IFIP …, 2016 - Springer
Abstract Cyber-Physical Systems are present in many industries such as aerospace,
automotive, health-care and transportation, and over time they have become critical and …

[PDF][PDF] On-The-Fly Fault-Tolerant Floating-Point Arithmetic

RP Duarte - Conference on, Aug, 2012 - academia.edu
On-the-Fly ROM-based Redundancy can detect and correct errors by using low-latency
redundant Look-Up Tables stored in ROM. Thus far, determining only fixed-point arithmetic …

[引用][C] On-The-Fly ROM-Based Redundancy Fault-Tolerance on FPGAs

[引用][C] Fault Minimization due to PVT Variation via Instruction Set Behavior Characterization