The use of static random access memory (SRAM)-based field programmable gate arrays
(FPGAs) in harsh radiation environments has grown in recent years. These types of …

This paper describes a FPGA configuration scrubbing approach for Xilinx 7-Series FPGAs
that combines the high-speed internal scrubbing available within these devices with an …

This study addresses the problem of geometric consistency between displayed images and
real scenes in augmented reality using a video see-through hand-held display or tablet. To …

In the paper, the SEU simulation framework for testing fault tolerant system designs
implemented into FPGA is presented. The framework is based on SEU generation outside …

With decreasing circuit lithography dimensions and increasing memory densities, an SEU
may affect multiple adjacent memory cells. This paper presents an SEU hardened memory …

The methodology for the design and testing of fault tolerant systems implemented into an
FPGA platform with different types of diagnostic techniques is presented in this paper. Basic …

The expansion of FPGA technology in numerous application fields is a fact. Single Event
Effects (SEE) are a critical factor for the reliability of FPGA based systems. For this reason, a …

Configuration scrubbing is a technique used for repairing Single Event Upsets (SEUs) within
the configuration memory of an FPGA. Scrubbing approaches have been developed using …

This article presents a new solution for easing the development of reconfigurable
applications using Field-Programable Gate Arrays (FPGAs). Namely, our Reliable …

This paper presents an SEU hardened latch that can mitigate SEU based on an error
detection circuit and a multiplexer. During the hold phase, an SEU on an internal node may …