AddNet: Deep neural networks using FPGA-optimized multipliers

J Faraone, M Kumm, M Hardieck, P Zipf… - … Transactions on Very …, 2019 - ieeexplore.ieee.org
Low-precision arithmetic operations to accelerate deep-learning applications on field-
programmable gate arrays (FPGAs) have been studied extensively, because they offer the …

Hardware architectures for the fast Fourier transform

M Garrido, F Qureshi, J Takala… - Handbook of signal …, 2019 - Springer
The fast Fourier transform (FFT) is a widely used algorithm in signal processing applications.
FFT hardware architectures are designed to meet the requirements of the most demanding …

A novel area-power efficient design for approximated small-point FFT architecture

X Han, J Chen, B Qin… - IEEE Transactions on …, 2020 - ieeexplore.ieee.org
Fast Fourier transform (FFT) is an essential algorithm in digital signal processing and
advanced mobile communications. With the continuous development of modern technology …

Using rotator transformations to simplify FFT hardware architectures

R Andersson, M Garrido - … transactions on circuits and systems I …, 2020 - ieeexplore.ieee.org
In this paper, we present a new approach to simplify fast Fourier transform (FFT) hardware
architectures. The new approach is based on a group of transformations called decimation …

ACOR: On the Design of Energy-Efficient Autocorrelation for Emerging Edge Applications

C Eleftheriadis, G Karakonstantis - 2023 IEEE/ACM …, 2023 - ieeexplore.ieee.org
The identification of patterns and changes in timeseries using the autocorrelation function
(ACF) is traditionally used in several applications from communications, multimedia to …

An Efficient High-Throughput Structured-Light Depth Engine

Y Bai, M Jiang, Q Zhu, X Chen, Y Du… - IEEE Transactions on …, 2022 - ieeexplore.ieee.org
In this article, an efficient high-throughput depth engine is proposed to generate high-quality
3-D depth maps for speckle-pattern structured-light depth cameras. A dynamic-binarization …

Optimal Adder-Multiplexer Co-Optimization for Time-Multiplexed Multiplierless Architectures

C Eleftheriadis, G Karakonstantis - IEEE Transactions on …, 2023 - ieeexplore.ieee.org
Many digital signal processing (DSP) applications in multimedia, telecommunications, and
artificial intelligence require several multiplications, which are considered among the most …

Multiplication by Constants

F de Dinechin, M Kumm - … -Specific Arithmetic: Computing Just Right for the …, 2023 - Springer
Multiplication by a constant is probably the most useful and best studied case of operator
specialization, in particular for its importance in the construction of digital filters. There are …

[PDF][PDF] Energy-Efficient Power Spectral Analysis Systems via Algorithm-Architecture Co-Design

C Eleftheriadis - 2024 - pure.qub.ac.uk
With the advent of internet of things (IoT), a significant portion of the computational load is
now conducted at remote locations at the network's edge, supporting an extensive number …

[图书][B] Run-time Reconfigurable Constant Multiplication on Field Programmable Gate Arrays

K Möller - 2017 - books.google.com
This book addresses the question how run-time reconfigurable constant multipliers (RCMs)
can be efficiently implemented on field programmable gate arrays (FPGAs). RCMs calculate …