This Chapter introduces parameterized, or parametric, Model Order Reduction (pMOR). The
Sections are offered in a prefered order for reading, but can be read independently. Section …

In this paper we describe a flexible and efficient new algorithm for model order reduction of
parameterized systems. The method is based on the reformulation of the parametric system …

Taking into consideration the variability specific to the nowadays nanotechnologies, the fast
extraction of parametric models is a must for the present VLSI and radio-frequency (RF) …

This article proposes a new methodology dedicated to the extraction of RF parametric macro-
models for electrostatically actuated micro switches. The sensitivities of the geometric …

Further downscaling of the integrated circuits pushes the limits of lithographic technologies
and certain variability effects previously considered negligible now should be taken into …

The on-going reduction of feature size and the increase of variability are the main
characteristics of today's integrated circuits. Certain variability effects previously considered …

In current state-of-art complex designs, interconnects become the dominant factor affecting
the performance of high speed integrated circuits. Signal integrity issues at high frequencies …

Continued device scaling into the nanometer region and high frequencies of operation well
into the multi-GHz region has given rise to new effects that previously had negligible impact …

The shrinking transistor according to Moore's Law has yielded many improvements in
microprocessor performance [2]. However, when VLSI devices are scaled into the …

This paper describes specialized techniques to extract parametric models for long
interconnects, modeled as transmission lines. An important step in the modeling is the …