[HTML][HTML] Applications and techniques for fast machine learning in science

AMC Deiana, N Tran, J Agar, M Blott… - Frontiers in big …, 2022 - frontiersin.org
In this community review report, we discuss applications and techniques for fast machine
learning (ML) in science—the concept of integrating powerful ML methods into the real-time …

Revisiting the high-performance reconfigurable computing for future datacenters

Q Ijaz, EB Bourennane, AK Bashir, H Asghar - Future Internet, 2020 - mdpi.com
Modern datacenters are reinforcing the computational power and energy efficiency by
assimilating field programmable gate arrays (FPGAs). The sustainability of this large-scale …

Transparent compiler and runtime specializations for accelerating managed languages on fpgas

M Papadimitriou, J Fumero, A Stratikopoulos… - arXiv preprint arXiv …, 2020 - arxiv.org
In recent years, heterogeneous computing has emerged as the vital way to increase
computers? performance and energy efficiency by combining diverse hardware devices …

Accelerating local laplacian filters on fpgas

S Khandelwal, Z Choudhury… - … Conference on Field …, 2020 - ieeexplore.ieee.org
Images when processed using various enhancement techniques often lead to edge
degradation and other unwanted artifacts such as halos. These artifacts pose a major …

Wireless noc for inter-fpga communication: Theoretical case for future datacenters

Q Ijaz, EB Bourennane - 2020 IEEE 23rd International …, 2020 - ieeexplore.ieee.org
Integration of FPGAs in datacenters might have different motivations from acceleration to
energy efficiency, but the goal of better performance tops all. FPGAs are being utilized in a …

Wireless versus wired network-on-chip to enable the multi-tenant multi-fpgas in cloud

Q Ijaz, EB Bourennane - 2021 IEEE International IOT …, 2021 - ieeexplore.ieee.org
The new era of computing is not CPU-centric but enriched with all the heterogeneous
computing resources including the reconfigurable fabric. In multi-FPGA architecture, either …

Thread-aware area-efficient high-level synthesis compiler for embedded devices

C Kim, S Jeong, S Cho, Y Lee, W Song… - 2021 IEEE/ACM …, 2021 - ieeexplore.ieee.org
In the embedded device market, custom hardware platforms such as an application specific
integrated circuit (ASIC) and a field programmable gate array (FPGA) are attractive thanks to …

[图书][B] Performance Optimisations for Heterogeneous Managed Runtime Systems

M Papadimitriou - 2021 - search.proquest.com
High demand for increased computational capabilities and power efficiency has resulted in
making commodity devices integrating diverse hardware resources. Desktops, laptops, and …

OpenCl-Based Efficient HLS Implementation of Iterative Graph Algorithms on FPGA

KÇ Hırlak - 2020 - search.proquest.com
The emergence of CPU-FPGA hybrid architectures creates a demand for high abstraction
programming tools such as High-Level Synthesis (HLS). HLS handles most of the FPGA …

[引用][C] Hpyc-fpga-integração de aceleradores em fpga de alto desempenho com python para jupyter notebooks

LB da Silva, JC Penha, DV Ribeiro, A Silva… - Simpósio em Sistemas …, 2022 - SBC