Analysis of SRAM metrics for data dependent BTI degradation and process variability
Abstract Bias Temperature Instability (BTI) is one of the most crucial reliability issues in
modern CMOS technology. It leads to shift in device parameters, which eventually affect …
modern CMOS technology. It leads to shift in device parameters, which eventually affect …
A dynamic capability-based framework for business process management: Theorizing and empirical application
K Ortbach, R Plattfaut, J Poppelbuß… - 2012 45th Hawaii …, 2012 - ieeexplore.ieee.org
Both incremental and radical business process change are undoubtedly core tasks of
Business Process Management (BPM) and, thus, organizational design. The competence to …
Business Process Management (BPM) and, thus, organizational design. The competence to …
A 7T high stable and low power SRAM cell design using QG-SNS FinFET
Abstract System on Chip (SoC) low power cache memories are in great demand. This
requires novel devices like FinFET instead of MOSFET. FinFET comes out as a multi-gate …
requires novel devices like FinFET instead of MOSFET. FinFET comes out as a multi-gate …
The defect-centric perspective of device and circuit reliability—From gate oxide defects to circuits
Abstract As-fabricated (time-zero) variability and mean device aging are nowadays routinely
considered in circuit simulations and design. Time-dependent variability (reliability-related …
considered in circuit simulations and design. Time-dependent variability (reliability-related …
Energy and reliability improvement of voltage-based, clustered, coarse-grain reconfigurable architectures by employing quality-aware mapping
An energy-quality scalable coarse grain reconfigurable architecture (CGRA) based on the
voltage overscaling (VOS) technique is presented. The approximation level of each …
voltage overscaling (VOS) technique is presented. The approximation level of each …
Exploring aging deceleration in FinFET-based multi-core systems
E Cai, D Stamoulis… - 2016 IEEE/ACM …, 2016 - ieeexplore.ieee.org
Power and thermal issues are the main constraints for high-performance multi-core systems.
As the current technology of choice, FinFET is observed to have lower delay under higher …
As the current technology of choice, FinFET is observed to have lower delay under higher …
A novel charge recycle read write assist technique for energy efficient and fast 20 nm 8T-SRAM array
The read instability of conventional 6T-SRAM cell has made the 8T-SRAM cell a substitute
for high data reliability. But the single ended nature of read operation demands a complete V …
for high data reliability. But the single ended nature of read operation demands a complete V …
The defect-centric perspective of device and circuit reliability—From individual defects to circuits
As-fabricated (time-zero) variability and mean device aging are nowadays routinely
considered in circuit simulations and design. Time-dependent variability (reliability …
considered in circuit simulations and design. Time-dependent variability (reliability …
A novel indirect read technique based SRAM with ability to charge recycle and differential read for low power consumption, high stability and performance
Read noise insertion problem of conventional read method of 6T-SRAM cell has forced to
think about indirect read. Indirect read though eliminates read noise insertion but also take …
think about indirect read. Indirect read though eliminates read noise insertion but also take …
NBTI-related variability impact on 14-nm node FinFET SRAM performance and static power: Correlation to time zero fluctuations
A Monte Carlo SPICE framework is proposed to evaluate the impact of negative bias
temperature instability (NBTI) variability on performance and static power (PS) of static …
temperature instability (NBTI) variability on performance and static power (PS) of static …