A Time Amplifier Assisted Frequency-to-Digital Converter Based Digital Fractional-N PLL
This article presents a wide input-range delay chain based time amplifier (TA) and its
application to a 6.5-GHz digital fractional-N phase-locked loop (PLL). The TA includes a …
application to a 6.5-GHz digital fractional-N phase-locked loop (PLL). The TA includes a …
Integrated Circuits for Wireless Communications: Research Activities at the University of California, San Diego: Circuits Research for Wireless Communications at the …
The continuing demand for improved wireless connectivity and enhanced data rates has
spurred worldwide research in microwave and millimeter (mm)-wave circuits and systems …
spurred worldwide research in microwave and millimeter (mm)-wave circuits and systems …
A Duty-Cycle-Error-Immune Reference Frequency Doubling Technique for Fractional- Digital PLLs
AI Eissa, E Alvarez-Fontecilla… - IEEE Transactions on …, 2024 - ieeexplore.ieee.org
Increasing a PLL's reference frequency offers significant performance advantages, but doing
so by increasing the PLL's crystal oscillator frequency is not a viable option in many …
so by increasing the PLL's crystal oscillator frequency is not a viable option in many …
DTC Linearization via Mismatch-Noise Cancellation for Digital Fractional-N PLLs
Digital-to-time converter (DTC) based quantization noise cancellation (QNC) has recently
been shown to enable excellent fractional-PLL performance, but it requires a highly-linear …
been shown to enable excellent fractional-PLL performance, but it requires a highly-linear …
Spectral Breathing and Its Mitigation in Digital Fractional-N PLLs
Although digital phase-locked loops (PLLs) offer several advantages over their analog
counterparts, they suffer from a major disadvantage that is rarely mentioned in published …
counterparts, they suffer from a major disadvantage that is rarely mentioned in published …
[图书][B] A Time Amplifier Assisted FDC and DTC Linearization for Digital Fractional-N PLLs
EMSA Helal - 2022 - search.proquest.com
Phase-locked loops (PLLs) are critical components in modern electronics communication
systems, where they are used to synthesize local oscillator signals for modulation and …
systems, where they are used to synthesize local oscillator signals for modulation and …
A fractional‐N MASH2‐k FDC phase‐locked loop architecture enabling higher‐order quantisation noise shaping
The quantisation noise contribution of a conventional FDC phase‐locked loop (PLL) is still
high due to the only second‐order noise‐shaping capability. A MASH2‐k FDC PLL …
high due to the only second‐order noise‐shaping capability. A MASH2‐k FDC PLL …