Single event transients in digital CMOS—A review
V Ferlet-Cavrois, LW Massengill… - IEEE Transactions on …, 2013 - ieeexplore.ieee.org
The creation of soft errors due to the propagation of single event transients (SETs) is a
significant reliability challenge in modern CMOS logic. SET concerns continue to be …
significant reliability challenge in modern CMOS logic. SET concerns continue to be …
Modeling of single event transients with dual double-exponential current sources: Implications for logic cell characterization
DA Black, WH Robinson, IZ Wilcox… - … on Nuclear Science, 2015 - ieeexplore.ieee.org
Single event effects (SEE) are a reliability concern for modern microelectronics. Bit
corruptions can be caused by single event upsets (SEUs) in the storage cells or by sampling …
corruptions can be caused by single event upsets (SEUs) in the storage cells or by sampling …
A bias-dependent single-event compact model implemented into BSIM4 and a 90 nm CMOS process design kit
A Bias-Dependent Single-Event Compact Model Implemented Into BSIM4 and a 90 nm
CMOS Process Design Kit Page 1 3152 IEEE TRANSACTIONS ON NUCLEAR SCIENCE …
CMOS Process Design Kit Page 1 3152 IEEE TRANSACTIONS ON NUCLEAR SCIENCE …
Single event upset and multiple cell upset modeling in commercial bulk 65-nm CMOS SRAMs and flip-flops
S Uznanski, G Gasiot, P Roche… - … on Nuclear Science, 2010 - ieeexplore.ieee.org
A proprietary Monte-Carlo simulation code dedicated to heavy ion cross-section prediction
has been developed. The code is based on diffusion-collection equations, takes into …
has been developed. The code is based on diffusion-collection equations, takes into …
Temperature dependence of digital SET pulse width in bulk and SOI technologies
C Shuming, L Bin, L Biwei… - IEEE Transactions on …, 2008 - ieeexplore.ieee.org
Using three-dimensional mixed-mode simulation, temperature dependence of digital SET
pulse width in bulk and PD SOI inverter chains has been studied. It was found that …
pulse width in bulk and PD SOI inverter chains has been studied. It was found that …
Investigation on transient ionizing radiation effects in a 4-Mb SRAM with dual supply voltages
T Li, Y Zhao, L Wang, L Shu, H Zheng… - … on Nuclear Science, 2022 - ieeexplore.ieee.org
The impact of transient ionizing radiation effects on a 4-Mb static random access memory
(SRAM) circuit which has an input–output (IO) supply voltage and a core supply voltage was …
(SRAM) circuit which has an input–output (IO) supply voltage and a core supply voltage was …
An investigation of single-event effect modeling techniques for a SiGe RF low-noise amplifier
NE Lourenco, S Zeinolabedinzadeh… - IEEE transactions on …, 2016 - ieeexplore.ieee.org
The single-event transient (SET) response of a SiGe-based, L-band low-noise amplifier
(LNA) is investigated, with a focus on providing recommendations for radiation event …
(LNA) is investigated, with a focus on providing recommendations for radiation event …
Analytical expression for temporal width characterization of radiation-induced pulse noises in SOI CMOS logic gates
D Kobayashi, T Makino, K Hirose - 2009 IEEE International …, 2009 - ieeexplore.ieee.org
Radiation-induced pulse noises called single-event transients, SETs, are becoming a
serious soft-error source for logic VLSIs. Analytical models explicitly expressing the …
serious soft-error source for logic VLSIs. Analytical models explicitly expressing the …
A biased random-key genetic algorithm for placement of virtual machines across geo-separated data centers
Cloud computing has recently emerged as a new technology for hosting and supplying
services over the Internet. This technology has brought many benefits, such as eliminating …
services over the Internet. This technology has brought many benefits, such as eliminating …
Multi-mode radiation hardened multi-core microprocessors
LT Clark - US Patent 10,579,536, 2020 - Google Patents
Systems and methods for multi-mode radiation hardened multi-core microprocessors are
disclosed. In some embodiments, a triplicated circuit includes a first core logic, a second …
disclosed. In some embodiments, a triplicated circuit includes a first core logic, a second …