Design of low power 4-bit flash ADC based on standard cells

MS Njinowa, HT Bui, FR Boyer - 2013 IEEE 11th International …, 2013 - ieeexplore.ieee.org
In this paper, a standard cell low power 4-bit flash analog-to-digital converter (ADC) is
proposed. The converter utilizes comparators created using only logic gates for converting …

Design of low power 2-bit flash adc using high performance dynamic double tail comparator

LR Thoutam, GR Vardhini, K Ramya… - 2022 IEEE …, 2022 - ieeexplore.ieee.org
The design and development of low power electronics has garnered a lot of interest in the
recent past due to rise of Internet of Things. The majority of IoT enabled devices rely on …

A bit swap logic (BSL) based bubble error correction (BEC) method for flash ADCs

P Ghoshal, SK Sen - 2016 2nd International Conference on …, 2016 - ieeexplore.ieee.org
Flash type analog to digital converters (ADCs) have the highest speed amongst all the
available ADCs because of their parallel architecture. The comparator outputs in a flash …

Encoders for flash analog-to-digital converters

DO Budanov, MM Pilipko… - 2018 IEEE Conference of …, 2018 - ieeexplore.ieee.org
Analog-to-digital converters (ADC) are used in modern high-performance
telecommunication systems. The fastest ADC is based on the flash architecture. The flash …

Verilog HDL model based thermometer-to-binary encoder with bubble error correction

Z Jaworski - … -23rd International Conference Mixed Design of …, 2016 - ieeexplore.ieee.org
This paper compares several approaches to come up with the Verilog HDL model of the
thermometer-to-binary encoder with bubble error correction. It has been demonstrated that …

Low power flash ADC using multiplexer based encoder

RR Jogdand, PK Dakhole… - … on Innovations in …, 2017 - ieeexplore.ieee.org
Low resolution and frequency in giga hertz data converters are required for Ultra wide band
(UWB) communication. Moreover, complexity of design increases with technology scaling …

A novel approach to thermometer-to-binary encoder of flash ADCs-bubble error correction circuit

S Kumar, MK Suman… - 2014 2nd International …, 2014 - ieeexplore.ieee.org
Thermometer-to-binary (TM2B) encoder is a vital component of a flash Analog-to-Digital
Converter (ADC). In this paper, we propose a new approach to subside Bubble Errors up to …

Comparative analysis of 6 bit thermometer-to-binary decoders for flash analog-to-digital converter

AV Kale, P Palsodkar… - … Systems and Network …, 2012 - ieeexplore.ieee.org
In the design of high speed Flash ADC selection of Thermometer to Binary decoder plays an
important role. This paper describes different decoder topologies suitable for Flash ADCs …

A process tolerant semi-self impedance calibration method for LPDDR4 memory controller

HJ Lee, YB Kim - … Midwest Symposium on Circuits and Systems …, 2015 - ieeexplore.ieee.org
This paper presents a novel process variation compensation technique for semi-self
impedance calibration of the transmission line driver implemented with the Low Voltage …

A novel low power high speed BEC for 2GHz sampling rate Flash ADC in 45nm technology

S Hussain, R Kumar, G Trivedi - 2017 IEEE International …, 2017 - ieeexplore.ieee.org
This paper depicts the idea of a novel bubbleerror corrector for removing the bubble error of
order 1and consuming less power. The earlier bubble error corrector (BEC) needed large …