RT-level ITC'99 benchmarks and first ATPG results

F Corno, MS Reorda, G Squillero - IEEE Design & Test of …, 2000 - ieeexplore.ieee.org
New design flows require reducing work at the gate level and performing most activities
before the synthesis step, including evaluation of testability of circuits. We propose a suite of …

A self-tuning analog proportional-integral-derivative (pid) controller

V Aggarwal, M Mao, UM O'reilly - First NASA/ESA Conference …, 2006 - ieeexplore.ieee.org
We present a platform for implementing low power selftuning analog proportional-integral-
derivative controllers. By using a model-free tuning method, the platform overcomes …

Functional verification of rtl designs driven by mutation testing metrics

Y Serrestou, V Beroulle… - 10th Euromicro Conference …, 2007 - ieeexplore.ieee.org
The level of confidence in a VHDL description directly depends on the quality of its
verification. This quality can be evaluated by mutation-based test, but the improvement of …

Design validation of RTL circuits using evolutionary swarm intelligence

M Li, K Gent, MS Hsiao - 2012 IEEE International Test …, 2012 - ieeexplore.ieee.org
In this paper, we present BEACON, a Branch-oriented Evolutionary Ant Colony OptimizatioN
method which is a bio-inspired meta-heuristic for design validation and functional test …

Fault models and test generation for hardware-software covalidation

IG Harris - IEEE Design & Test of Computers, 2003 - ieeexplore.ieee.org
Fault models and test generation for hardware-software covalidation Page 1 Hardware-Software
Covalidation 40 0740-7475/03/$17.00 © 2003 IEEE Copublished by the IEEE CS and the IEEE …

Amleto: A multi-language environment for functional test generation

A Fin, F Fummi, G Pravadelli - Proceedings International Test …, 2001 - ieeexplore.ieee.org
More and more people are starting to use the SystemC description language to model and
simulate new designs. This is due mainly to the simplicity and power of the language. The …

Automated functional test generation for digital systems through a compact binary differential evolution algorithm

AM Cruz, RB Fernández, HM Lozano… - Journal of Electronic …, 2015 - Springer
At present, the functional verification of a device represents the highest cost during
manufacturing. To reduce that cost, several methods have been suggested. In this work we …

Functional test generation at the rtl using swarm intelligence and bounded model checking

K Gent, MS Hsiao - 2013 22nd Asian Test Symposium, 2013 - ieeexplore.ieee.org
Although stochastic search techniques have shown promise in test generation and design
validation, they often fail when there is a specific, random-resistant sequence of vectors …

基于遗传算法和覆盖率驱动的功能验证向量自动生成算法

罗春, 杨军, 凌明 - 应用科学学报, 2005 - jas.shu.edu.cn
提出了一种基于遗传算法和覆盖率驱动的RTL (register transfer level) 代码功能验证向量自动
生成算法. 其特点是自动反馈覆盖率信息, 构成一个闭环系统; 用遗传算法动态分析覆盖率信息 …

Privacy model and annotation for DaaS

M Mrissa, SE Tbahriti, HL Truong - 2010 Eighth IEEE European …, 2010 - ieeexplore.ieee.org
Data as a Service (DaaS) builds on service-oriented technologies to enable fast access to
data resources on the Web. However, this paradigm raises several new concerns that …