(22) F1169: Mar-20'1998 Aprocess for applying a metalliZation interconnect structure (51)
Int. c1. 7........................... c251) 5/02; H01L 21/288;'0 a Semiconductor workpiece having a …

Related US Application Data A process for metallization of a workpiece, Such as a
Semiconductor workpiece. In an embodiment, an alkaline (63) Continuation of application …

A process for applying a metallization interconnect as to a semiconductor workpiece having
a barrier layer deposited on a surface thereof is set forth. The process includes the forming …

BACKGROUND OF THE INVENTION The technology of making interconnections to provide
for vias, lines and other recesses in semiconductor chip structures,? at panel displays, and …

472,502 12/1995 Lowery.(*) Notice: This patent issued on a continued pros- 5,549,808
8/1996 Farooq et al.. ecution application filed under 37 CFR 5,639,316 6/1997 Cabral, Jr. et …

A facility for selecting and refining electrical parameters for processing a microelectronic
workpiece in a processing chamber is described. The facility initially configures the electrical …

A method and apparatus for processing a microelectronic workpiece using metrology. The
apparatus can include one or more processing or transport units, a metrology unit, and a …

A reactor for electrochemically processing at least one surface of a microelectronic
workpiece is set forth. The reactor comprises a reactor head including a workpiece support …

A process for applying a metallization interconnect structure to a semiconductor workpiece
having a barrier layer deposited on a surface thereof is set forth. The process includes the …

The present invention uses a glass to act as a substrate. A stencil layer is patterned on the
top surface of the substrate. Successively, a copper layer is deposited over the substrate …