We report the design and implementation of a parallel two-dimensional fast Fourier
transform (2D FFT) algorithm on a Field Programmable Gate Array (FPGA) for real-time MR …

This paper proposes an efficient parallel memory system for algorithms applied in fixed and
variable block-size motion estimation (VBSME). The proposed system is implemented by a …

Single instruction multiple data (SIMD) execution is in no doubt an efficient way to exploit the
data level parallelism in image and video applications. However, SIMD execution …

We propose an interleaved memory organization supporting multi-pattern parallel accesses
in two-dimensional (2D) addressing space. Our proposal targets computing systems with …

Single-Instruction-Multiple-Data (SIMD) architectures are widely used to accelerate
applications involving Data-Level Parallelism (DLP); the on-chip memory system facilitates …

Accessing pixels in memory is a well-known bottleneck of SIMD (single instruction multiple
data) processors in video/imaging. To tackle it, we propose new block and row access …

Many applications running on parallel processors and accelerators are bandwidth bound. In
this work, we explore the benefits of parallel (scratch-pad) memories to further accelerate …

In modern multimedia applications, memory bottleneck can be alleviated with special stride
data accesses. Data elements in stride access can be retrieved in parallel with parallel …

In this paper we present an efficient data fetch circuitry to retrieve several operands from an-
way parallel memory system in a single machine cycle. The proposed address generation …

摘要针对不规则数据访问模式图像处理应用提出了一种通用的高效无冲突并行访问存储模型.
在主存储器与处理器之间构建了一种多体存储结构, 并将大部分的不规则数据访问模式归类为对 …