A 3.5 GS/s 1-1 MASH VCO ADC with second-order noise shaping

B Saux, J Borgmans, J Raman… - IEEE Transactions on …, 2024 - ieeexplore.ieee.org
In this work, a 3.5 GS/s voltage-controlled oscillator (VCO) analog-to-digital converter (ADC)
using multi-stage noise shaping (MASH) is presented. This 28nm CMOS ADC achieves …

Methodologies for analog-to-digital conversion with high bandwidth and high accuracy based on voltage-controlled oscillators

J Borgmans - 2023 - biblio.ugent.be
For the past few decades, the scale of global interconnection has been expanding
exponentially, seemingly without an end in sight. When you take in your surroundings when …

A 32 nm CNFET Model Voltage Controlled Oscillator based ADC Design for Computation-in-Memory Architecture using Emerging ReRAM's

G Snehalatha, ER Thuraka - CVR Journal of Science and Technology, 2025 - cvr.ac.in
Applications that are becoming more and more computationally demanding are beyond the
capabilities of traditional Von Neumann systems. By adopting new architectural …

[PDF][PDF] Design of power-efficient VCO-ADCs using

S Ooghe - libstore.ugent.be
Throughout the past year, I have been able to discover the compelling subject of VCO-
ADCs. I am very grateful to my supervisor Prof. dr. ir. Pieter Rombouts and counsellors Ir …