The base-2 logarithmic arithmetic converts multiplication to hardware-efficient shift and
addition. Aimed for a good trade-off between circuit complexity and accuracy, a logarithmic …

The increasing computational intensity of important new applications poses a challenge for
their use in resource-restricted devices. Approximate computing using power-efficient …

Edge training of deep neural networks (DNNs) is a desirable goal for continuous learning;
however, it is hindered by the enormous computational power required by training …

The IEEE 754 standard for floating-point (FP) arithmetic is widely used for real numbers.
Recently, a variant called posit was proposed to improve the precision around 1 and− 1 …

浮点乘法器是高动态范围(HDR) 图像处理, 无线通信等系统中的关键运算单元,
其相比于定点乘法器动态范围更广, 但复杂度更高. 近似计算作为一种新兴范式 …

In this paper, we propose energy-efficient unsigned approximate multipliers using the
Pseudo-Booth (PB) encoding that are suitable for large dynamic-range operands thanks to …

In this paper, an efficient logarithm approximate multiplier architecture is proposed. The
proposed architecture is designed based on the Mitchell approximate multiplier. Several …

Approximate computing has been introduced to reduce the circuit area and power
consumption in error-tolerant applications. The wireless communication system can …

In recent years, the communication circuits and systems have become more complicated
and more power hungry. However, due to the channel noise and forward error correction …

Floating-point (FP) arithmetic computation is favored for training neural networks (NNs) due
to its wide numerical range. The computation-intensive training process requires a …