In a multi-programmed computing environment, threads of execution exhibit different runtime
characteristics and hardware resource requirements. Not only do the behaviors of distinct …

Shared memory is a common interprocessor communication paradigm for single-chip
multiprocessor platforms. Snoop-based cache coherence is a very successful technique that …

The heterogeneous multiprocessor task partitioning with replication problem involves
determining a mapping of recurring tasks upon a set consisting of different processing units …

There have been numerous efforts on Scratch-Pad Memory (SPM) management in the
context of single CPU systems and, more recently, multi-processor architectures. This paper …

Current trends indicate that multiprocessor-system-on-chip (MPSoC) architectures are being
increasingly used in building complex embedded systems. While circuit/architectural support …

The trends in advanced integrated circuit technologies require us to look for new ways to
utilize large numbers of gates and reduce the effects of high interconnect delays. One …

Real-time multimedia applications that involve processing of video and audio streams
demand computational performance of a few Giga operations per second, which cannot be …

Shared memory is a common interprocessor communication paradigm for single-chip multi-
processor platforms. Snoop-based cache coherence is a very successful technique that …

Maintaining local caches coherent in bus-based multiprocessor systems results in
significantly elevated power consumption, as the bus snooping protocols require local cache …

The performance of the various cache coherence protocols proposed in the literature have
been extensively analyzed in the context of high-performance multi-processor systems. A …