A review and analysis of automatic optical inspection and quality monitoring methods in electronics industry

M Abd Al Rahman, A Mousavi - Ieee Access, 2020 - ieeexplore.ieee.org
Electronics industry is one of the fastest evolving, innovative, and most competitive
industries. In order to meet the high consumption demands on electronics components …

Advances in machine learning and deep learning applications towards wafer map defect recognition and classification: a review

T Kim, K Behdinan - Journal of Intelligent Manufacturing, 2023 - Springer
With the high demand and sub-nanometer design for integrated circuits, surface defect
complexity and frequency for semiconductor wafers have increased; subsequently …

Decision tree ensemble-based wafer map failure pattern recognition based on radon transform-based features

M Piao, CH Jin, JY Lee, JY Byun - IEEE Transactions on …, 2018 - ieeexplore.ieee.org
Wafer maps contain information about defects and clustered defects that form failure
patterns. Failure patterns exhibit the information related to defect generation mechanisms …

A light-weight neural network for wafer map classification based on data augmentation

TH Tsai, YC Lee - IEEE Transactions on Semiconductor …, 2020 - ieeexplore.ieee.org
In the semiconductor industry, the testing section has always played an important role. The
testing section often requires engineers to judge the defect, which wastes a lot of time and …

Wafer map defect detection and recognition using joint local and nonlocal linear discriminant analysis

J Yu, X Lu - IEEE Transactions on Semiconductor …, 2015 - ieeexplore.ieee.org
In semiconductor manufacturing processes, defect detection and recognition in wafer maps
have received increasing attention from semiconductor industry. The various defect patterns …

A novel DBSCAN-based defect pattern detection and classification framework for wafer bin map

CH Jin, HJ Na, M Piao, G Pok… - IEEE Transactions on …, 2019 - ieeexplore.ieee.org
Defective die on a wafer map tend to cluster in distinguishable patterns, and such defect
patterns can provide crucial information to identify equipment problems or process failures in …

Wafer defect pattern recognition and analysis based on convolutional neural network

N Yu, Q Xu, H Wang - IEEE Transactions on Semiconductor …, 2019 - ieeexplore.ieee.org
Wafer map defect pattern contains the critical information about semiconductor
manufacturing, effective defect analysis technology can improve the yield of products. This …

Deep-structured machine learning model for the recognition of mixed-defect patterns in semiconductor fabrication processes

G Tello, OY Al-Jarrah, PD Yoo… - IEEE Transactions …, 2018 - ieeexplore.ieee.org
Semiconductor manufacturers aim to fabricate defect-free wafers in order to improve product
quality, increase yields, and reduce costs. Typically, wafer defects form spatial patterns that …

Self-supervised representation learning for wafer bin map defect pattern classification

H Kahng, SB Kim - IEEE Transactions on Semiconductor …, 2020 - ieeexplore.ieee.org
Automatic identification of defect patterns in wafer bin maps (WBMs) stands as a challenging
problem for the semiconductor manufacturing industry. Deep convolutional neural networks …

A semi-supervised and incremental modeling framework for wafer map classification

Y Kong, D Ni - IEEE Transactions on Semiconductor …, 2020 - ieeexplore.ieee.org
Wafer map analysis provides critical information for quality control and yield improvement
tasks in semiconductor manufacturing. In particular, wafer patterns of gross failing areas …