Chip multicore processors (CMPs) have emerged as the dominant architecture choice for
modern computing platforms and will most likely continue to be dominant well into the …

In this paper, we propose PDRAM, a novel energy efficient main memory architecture based
on phase change random access memory (PRAM) and DRAM. The paper explores the …

Energy efficiency and energy-proportional computing have become a central focus in
enterprise server architecture. As thermal and electrical constraints limit system power, and …

Main memory, composed of DRAM, is a performance bottleneck for many applications, due
to the high DRAM access latency. In-DRAM caches work to mitigate this latency by …

Recent trends of CMOS technology scaling and wide-spread use of multicore processors
have dramatically increased the power consumption of main memory. It has been estimated …

Servers: high-end, multiprocessor systems running commercial workloads, have typically
included extensive cooling systems and resided in custom-built rooms for high-power …

DRAM vendors have traditionally optimized the cost-per-bit metric, often making design
decisions that incur energy penalties. A prime example is the overfetch feature in DRAM …

Main memory (DRAM) consumes as much as half of the total system power in a computer
today, due to the increasing demand for memory capacity and bandwidth. There is a …

Emerging three-dimensional (3D) integration technology allows for the direct placement of
DRAM on top of a microprocessor, significantly reducing the wire-delay between the two and …

In this paper we discuss the design and implementation of the simulator PowerMill, a novel
transistor level simulator for the simulation of current and power behavior in vlsi circuits. With …