A new coplanar design of a 4‐bit ripple carry adder based on quantum‐dot cellular automata technology

S Seyedi, B Pourghebleh… - IET Circuits, Devices & …, 2022 - Wiley Online Library
Quantum‐dot cellular automata (QCA) is one of the best methods to implement digital
circuits at nanoscale. It has excellent potential with high density, fast switching speed, and …

Analysis and optimization of product-accumulation section for efficient implementation of FIR filters

X Lou, YJ Yu, PK Meher - … on Circuits and Systems I: Regular …, 2016 - ieeexplore.ieee.org
Most of the research on the implementation of finite impulse response (FIR) filter so far
focuses on the optimization of the multiple constant multiplication (MCM) block. But it is …

Lower bound analysis and perturbation of critical path for area-time efficient multiple constant multiplications

X Lou, YJ Yu, PK Meher - IEEE Transactions on Computer …, 2016 - ieeexplore.ieee.org
In this paper, a precise systematic delay model is proposed for the analysis and estimation
of critical path delay of multiple constant multiplication (MCM) blocks. For the first time in …

A systematic delay and power dominant carry save adder design

AK Vamsi, NU Kumar, KB Sindhuri… - … Conference on Smart …, 2018 - ieeexplore.ieee.org
This paper presents an efficient carry save adder design with multiplexer based adder
architecture, instead of using ripple carry adder it replaces this ripple carry adder with …

The CMOS carry-forward adders

CH Huang, JS Wang, C Yeh… - IEEE Journal of Solid …, 2004 - ieeexplore.ieee.org
The ripple-carry adder (RCA) has the simplest circuit structure but the longest delay among
all adders. Thus, it is often realized with the dynamic circuits when speed is the major …

Optimized adder cells for ternary ripple-carry addition

RF Mirzaee, K Navi - IEICE Transactions on Information and …, 2014 - search.ieice.org
The unique characteristic of Ternary ripple-carry addition enables us to optimize Ternary Full
Adder for this specific application. Carbon nanotube field effect transistors are used in this …

Dependency sensitive shadow SWIFT

U Shanker, M Misra, AK Sarje… - 2006 10th International …, 2006 - ieeexplore.ieee.org
This paper proposes a new commit protocol for real time distributed database systems,
dependency sensitive shadow SWIFT (DSS-SWIFT) protocol where the cohort forks off a …

[PDF][PDF] Design of novel high speed parallel prefix adder

DK Athur, B Narayanan, A Gopalakrishnan… - Indonesian Journal of …, 2023 - academia.edu
Adders are crucial logical building blocks found almost in all the modern electronic system
designs. In the adder architecture design, the fundamental issue is the propagation latency …

New method for high performance multiply-accumulator design

B Xia, P Liu, Q Yao - Journal of Zhejiang University-SCIENCE A, 2009 - Springer
This study presents a new method of 4-pipelined high-performance split multiply-
accumulator (MAC) architecture, which is capable of supporting multiple precisions …

Adder methodology and design using probabilistic multiple carry estimates

EM Ashmila, SS Dlay, OR Hinton - IEE Proceedings-Computers and Digital …, 2005 - IET
A novel approach for designing estimated carry adders for use in asynchronous circuits is
presented. It demonstrates that by using statistical probability of a carry being in a particular …