Network congestion can limit performance of NoC due to increased transmission latency
and power consumption. Congestion-aware adaptive routing can greatly improve the …

Performance and reliability achieved by a modular redundant system depend on the
recovery scheme used. Typically, gain in performance using comparable resources results …

Dataflow architecture has shown its advantages in many high-performance computing
cases. In dataflow computing, a large amount of data are frequently transferred among …

3D Network-on-Chip (NoC) architectures are capable of achieving better performance and
lower energy consumption compared to their planar counterparts. However, conventional …

Wireless sensor–actor networks are a recent development of wireless networks where both
ordinary sensor nodes and more sophisticated and powerful nodes, called actors, are …

In this paper, we present a Cu stom P arallel A rchitecture for N eural networks (CuPAN).
CuPAN consists of streamlined nodes that each node is able to integrate a single or a group …

Multi dimensional Network on Chip (NoC) with high density devices scaling has emerged as
a better alternative for large Systems-on-Chip (SoC) design. Add-on ports in 2D or 3D NoC …

The state-based formal method Event-B relies on the concept of correct stepwise
development, ensured by discharging corresponding proof obligations. The register-voice …

在高性能计算领域中, 数据流结构有较多的优势. 在数据流计算模式中, 大量的操作数需要通过
片上网络在不同处理单元中传输. 因此路由的设计对数据流结构的性能具有较大的影响 …

Abstract Networks on a Chip (NoCs) have been proposed to solve the communication
challenges in Multi-Processor Systems on a Chip (MPSoCs) with ever increasing number of …