Compiling for reconfigurable computing: A survey

JMP Cardoso, PC Diniz, M Weinhardt - ACM Computing Surveys (CSUR …, 2010 - dl.acm.org
Reconfigurable computing platforms offer the promise of substantially accelerating
computations through the concurrent nature of hardware structures and the ability of these …

Modern development methods and tools for embedded reconfigurable systems: A survey

L Jóźwiak, N Nedjah, M Figueroa - Integration, 2010 - Elsevier
Heterogeneous reconfigurable systems provide drastically higher performance and lower
power consumption than traditional CPU-centric systems. Moreover, they do it at much lower …

A quantitative analysis of the speedup factors of FPGAs over processors

Z Guo, W Najjar, F Vahid, K Vissers - … of the 2004 ACM/SIGDA 12th …, 2004 - dl.acm.org
The speedup over a microprocessor that can be achieved by implementing some programs
on an FPGA has been extensively reported. This paper presents an analysis, both …

Wordlength optimization for linear digital signal processing

GA Constantinides, PYK Cheung… - IEEE Transactions on …, 2003 - ieeexplore.ieee.org
This paper presents an approach to the wordlength allocation and optimization problem for
linear digital signal processing systems implemented as custom parallel processing units …

CHiMPS: A C-level compilation flow for hybrid CPU-FPGA architectures

A Putnam, D Bennett, E Dellinger… - … Conference on Field …, 2008 - ieeexplore.ieee.org
This paper describes CHiMPS, a C-based accelerator compiler for hybrid CPU-FPGA
computing platforms. CHiMPS's goal is to facilitate FPGA programming for high-performance …

A compiler approach to fast hardware design space exploration in FPGA-based systems

B So, MW Hall, PC Diniz - ACM SIGPLAN Notices, 2002 - dl.acm.org
The current practice of mapping computations to custom hardware implementations requires
programmers to assume the role of hardware designers. In tuning the performance of their …

The TaPaSCo Open-Source Toolflow: for the Automated Composition of Task-Based Parallel Reconfigurable Computing Systems

C Heinz, J Hofmann, J Korinth, L Sommer… - Journal of Signal …, 2021 - Springer
The integration of FPGA-based accelerators into a complete heterogeneous system is a
challenging task faced by many researchers and engineers, especially now that FPGAs …

Energy-and time-efficient matrix multiplication on FPGAs

JW Jang, SB Choi, VK Prasanna - IEEE Transactions on Very …, 2005 - ieeexplore.ieee.org
We develop new algorithms and architectures for matrix multiplication on configurable
devices. These have reduced energy dissipation and latency compared with the state-of-the …

Optimized generation of data-path from C codes for FPGAs

Z Guo, B Buyukkurt, W Najjar… - Design, automation and …, 2005 - ieeexplore.ieee.org
FPGAs, as computing devices, offer significant speedup over microprocessors. Furthermore,
their configurability offers an advantage over traditional ASICs. However, they do not yet …

Input data reuse in compiling window operations onto reconfigurable hardware

Z Guo, B Buyukkurt, W Najjar - ACM SIGPLAN Notices, 2004 - dl.acm.org
Balancing computation with I/O has been considered as a critical factor of the overall
performance for embedded systems in general and reconfigurable computing systems in …