At-speed testing of gigahertz processors using external testers may not be technically and
economically feasible. Hence, there is an emerging need for low-cost high-quality self-test …

During the past few years there has been an dramatic upsurge in research and
development, implementations of new technologies, and deployments of actual solutions …

The programmable cores on SoCs can perform on-chip test generation, measurement,
response analysis, and even diagnosis. This software-based approach to self-testing …

Scan based test techniques offer a very efficient alternative to achieve high fault coverage
when compared to functional pattern testing. As circuit sizes grow ever larger, test data …

A low-overhead scheme for achieving complete (100%) fault coverage during built-in self
test of circuits with scan is presented. It does not require modifying the function logic and …

Among the post-CMOS technologies currently under investigation, quantum computing (QC)
holds a special place. QC offers not only extremely small size and low power, but also …

An automatic test pattern generation (ATPG) method is presented for a scan-based test
architecture which minimizes ATE storage requirements and reduces the bandwidth …

Spurred by technology leading to the availability of millions of gates per chip, system-level
integration is evolving as a new paradigm, allowing entire systems to be built on a single …

A deterministic software-based self-testing methodology for processor cores is introduced
that efficiently tests the processor datapath modules without any modification of the …

An increasing part of microelectronic systems is implemented on the basis of predesigned
and preverified modules, so-called cores, which are reused in many instances. Core …