Failure mechanisms driven reliability models for power electronics: A review

OE Gabriel, DR Huitink - Journal of …, 2023 - asmedigitalcollection.asme.org
Miniaturization as well as manufacturing processes that electronics devices are subjected to
often results in to increase in operational parameters such as current density, temperature …

InFO (wafer level integrated fan-out) technology

CF Tseng, CS Liu, CH Wu, D Yu - 2016 IEEE 66th Electronic …, 2016 - ieeexplore.ieee.org
A powerful integrated fan-out (InFO) wafer level system integration (WLSI) technology has
been developed to integrate application processor chip with memory package for smart …

Recent advances in EM and BTI induced reliability modeling, analysis and optimization

SXD Tan, H Amrouch, T Kim, Z Sun, C Cook, J Henkel - Integration, 2018 - Elsevier
In this article, we will present recent advances in reliability effects such as electromigration
on interconnects and Negative/Positive Bias Temperature Instability (N/P BTI) effects on …

[图书][B] Fundamentals of electromigration

J Lienig, M Thiele, J Lienig, M Thiele - 2018 - Springer
This chapter investigates in detail the actual low-level migration processes. A solid
grounding in the physics of electromigration (EM) and its specific effects on the interconnect …

Analytical modeling and characterization of electromigration effects for multibranch interconnect trees

HB Chen, SXD Tan, X Huang, T Kim… - IEEE Transactions on …, 2016 - ieeexplore.ieee.org
Electromigration (EM) in very large scale integration (VLSI) interconnects has become one
of the major reliability issues for current and future VLSI technologies. However, existing EM …

TSV defects and TSV-induced circuit failures: The third dimension in test and design-for-test

K Chakrabarty, S Deutsch… - 2012 IEEE International …, 2012 - ieeexplore.ieee.org
3D integrated circuits (3D ICs) based on through-silicon vias (TSVs) have emerged as a
promising solution for overcoming interconnect and power bottlenecks in IC design …

Fast electromigration immortality analysis for multisegment copper interconnect wires

Z Sun, E Demircan, MD Shroff, C Cook… - IEEE Transactions on …, 2018 - ieeexplore.ieee.org
In this paper, we present a novel and fast electromigration (EM) immortality check for
general multisegment interconnect wires. Instead of using current density as the key …

TSV-based 3-D ICs: Design methods and tools

T Lu, C Serafy, Z Yang, SK Samal… - … on Computer-Aided …, 2017 - ieeexplore.ieee.org
Vertically integrated circuits (3-D ICs) may revitalize Moore's law scaling which has slowed
down in recent years. 3-D stacking is an emerging technology that stacks multiple dies …

Physics-based electromigration modeling and assessment for multi-segment interconnects in power grid networks

X Wang, H Wang, J He, SXD Tan… - Design, Automation & …, 2017 - ieeexplore.ieee.org
Electromigration (EM) is considered to be one of the most important reliability issues for
current and future ICs in 10nm technology and below. In this paper we focus on the EM …

Voltage-based electromigration immortality check for general multi-branch interconnects

Z Sun, E Demircan, MD Shroff, T Kim… - 2016 IEEE/ACM …, 2016 - ieeexplore.ieee.org
As VLSI technology features are pushed to the limit with every generation and with the
introduction of new materials and increased current densities to satisfy the performance …