Programmers for GPGPU face rapidly changing substrate of programming abstractions,
execution models, and hardware implementations. It has been established, through …

Reference implementations of signal processing applications are often written in a
sequential language that does not reveal the available parallelism in the application …

1.1 Introduction isl is a thread-safe C library for manipulating sets and relations of integer
points bounded by affine constraints. The descriptions of the sets and relations may involve …

Identifying the (near) optimal program variants an optimizing and parallelizing compiler
should generate is known to be difficult. Autotuning is the best solution to navigate the often …

Tiling is a widely used loop transformation for exposing/exploiting parallelism and data
locality. Effective use of tiling requires selection and tuning of the tile sizes. This is usually …

Emerging computing architectures present concurrent, heterogeneous, and hierarchical
organizations. Explicit management of distributed memories, bulk communications, and the …

We detail an algorithm implemented in the R-Stream compiler1 to perform controlled array
expansion and conversion to partial single-assignment form, which consists of (1) allowing …

In heterogeneous multi-core systems, such as the Cell BE processor, each accelerator core
has its own fast local memory without hardware supported coherence and the software is …

We propose a new set of automated techniques to optimize memory reuse in programs with
explicitly managed memory. Our techniques are inspired by hand-tuned seismic kernels on …

A compilation system using an energy model based on a set of generic and practical
hardware and software parameters is presented. The model can represent the major trends …