Recent breakthroughs in Deep Neural Networks (DNNs) have fueled a growing demand for
domain-specific hardware accelerators (ie, DNN chips). However, designing DNN chips is …

This paper presents bambu, a modular framework for research on high-level synthesis
currently under development at Politecnico di Milano. It can accept most of C constructs …

To speedup Deep Neural Networks (DNN) accelerator design and enable effective
implementation, we propose HybridDNN, a framework for building high-performance hybrid …

As growing power dissipation and thermal effects disrupted the rising clock frequency trend
and threatened to annul Moore's law, the computing industry has switched its route to higher …

Scheduling plays a central role in the behavioral synthesis process, which automatically
compiles high-level specifications into optimized hardware implementations. However, most …

Large Language Models (LLMs) have revolutionized a wide range of applications with their
strong human-like understanding and creativity. Due to the continuously growing model size …

Real-world applications such as image processing, signal processing, and others often
contain a sequence of computation intensive kernels, each represented in the form of a …

While maximizing deep neural networks'(DNNs') acceleration efficiency requires a joint
search/design of three different yet highly coupled aspects, including the networks, bitwidths …

High Level Synthesis (HLS) languages and tools are emerging as the most promising
technique to make FPGAs more accessible to software developers. Nevertheless, picking …

Achievable frequency (fmax) is a widely used input constraint for designs targeting Field-
Programmable Gate Arrays (FPGA), because of its impact on design latency and throughput …