Quadrature clock generation with injection locking

B Pandita, Z Gao, E Hailu - US Patent 10,476,434, 2019 - Google Patents
Aspects of the disclosure are directed to quadrature clock generation with injection locking.
In accordance with one aspect, quadrature clock generation with injection locking uses a …

Ring voltage-controlled oscillator and phase-locked loop

X Wang, Q Chen - US Patent 10,707,844, 2020 - Google Patents
A ring voltage control oscillator includes: a conversion unit (100), cascaded multistage delay
units (200) and cascaded multistage isolation buffer units (300). The conversion unit (100) …

Injection locked clock receiver

R Polster, JLG Jimenez, IM PANADES - US Patent 10,090,992, 2018 - Google Patents
A clock receiver including: a ring oscillator adapted to generate a clock signal, the ring
oscillator having a sequence of N inverters, an input of a first inverter being coupled to a …

Poly phase filter with phase error enhance technique

FW Lee, WC Wang, YH Lin - US Patent 11,811,413, 2023 - Google Patents
The present invention provides a filtering circuit comprising a poly phase filter and a
quadrature phase detector. The poly phase filter comprises a first path, a second path, a …

Injection locking oscillator circuit and operating method

Y Choi, W Jung, Y Cho, C Youngdon… - US Patent 11,545,966, 2023 - Google Patents
An injection locking oscillator (ILO) circuit includes; an injection circuit that receives input
signals having a phase difference and provides injection signals respectively corre …

Frequency multiplier and method for frequency multiplying

M Bassi, F Padovan - US Patent 11,005,485, 2021 - Google Patents
A frequency multiplier comprises a phase generator configured to receive an oscillation
signal and to provide at phase generator outputs versions of the oscillation signal, which are …

Switch control circuit

Y Morishita - US Patent 10,200,023, 2019 - Google Patents
(57) ABSTRACT A switch control circuit includes: a clock generating circuit that generates
one or more periodic signals having a prede termined cycle; a clock adjusting circuit that …