CASINO core microarchitecture: Generating out-of-order schedules using cascaded in-order scheduling windows

I Jeong, S Park, C Lee, WW Ro - 2020 IEEE International …, 2020 - ieeexplore.ieee.org
The performance gap between in-order (InO) and out-of-order (OoO) cores comes from the
ability to dynamically create highly optimized instruction issue schedules. In this work, we …

Register allocation compilation technique for ASIP in 5G micro base stations

W Chen, D Liu, S Liu - China Communications, 2022 - ieeexplore.ieee.org
The currently available compilation techniques are for general computing and are not
optimized for physical layer computing in 5G micro base stations. In such cases, the …