Nanosheet with single epitaxial stack forming off-set dual material channels for gate-all-around CMOS

X Miao, J Zhang, A Reznicek, CH Lee - US Patent 10,593,673, 2020 - Google Patents
(57) ABSTRACT A semiconductor structure is provided in which an nFET nanosheet stack of
suspended silicon channel material nanosheets is present in an nFET device region and a …

Wrap-all-around contact for nanosheet-FET and method of forming same

EMS Bourjot, J Frougier, Y Qi, R Xie, H Zang… - US Patent …, 2020 - Google Patents
Described herein are nanosheet-FET structures having a wrap-all-around contact where the
contact wraps entirely around the S/D epitaxy structure, thereby increasing contact area and …

Formation of wrap-around-contact to reduce contact resistivity

A Carr, J Zhang, CH Lee, T Ando… - US Patent 10,586,872, 2020 - Google Patents
A method of forming a source/drain contact is provided. The method includes forming a
sacrificial layer on a source/drain, and depositing an oxidation layer on the sacrificial layer …

Gate-all-around field-effect transistor devices having source/drain extension contacts to channel layers for reduced parasitic resistance

K Cheng, Y Song, Z Bi - US Patent 10,832,907, 2020 - Google Patents
Devices and methods are provided for fabricating field-effect transistors having source/drain
extension contacts to provide reduced parasitic resistance in electrical paths between …

Method of forming wrap-around-contact and the resulting device

J Frougier, R Xie - US Patent 10,804,398, 2020 - Google Patents
(57) ABSTRACT A device including source-drain epitaxy contacts with a trench silicide (TS)
liner wrapped around the source-drain contacts, and method of production thereof …

Gate metal patterning to avoid gate stack attack due to excessive wet etching

J Wang, A Reznicek, S Mochizuki, J Rubin - US Patent 10,573,521, 2020 - Google Patents
(57) ABSTRACT A method of forming gate structures to a nanosheet device that includes
forming at least two stacks of nanosheets, wherein each nanosheet includes a channel …

Wrap-around contacts formed with multiple silicide layers

R Xie, J Frougier, K Cheng, A Carr… - US Patent 10,276,442, 2019 - Google Patents
Structures for a field-effect transistor and methods of form ing structures for a field-effect
transistor. A first field-effect transistor has a first source/drain region, and a second field …

Multiple width nanosheet devices

K Cheng, LA Clevenger, C Radens, J Wang… - US Patent …, 2019 - Google Patents
(57) ABSTRACT A technique relates to a semiconductor device. A first stack includes a first
plurality of nanowires respectively coupled to first source and drain regions, and a second …

Increased transistor source/drain contact area using sacrificial source/drain layer

B Guha, W Hsu, SM Cea, T Ghani - US Patent 11,495,672, 2022 - Google Patents
Integrated circuit structures including increased transistor source/drain (S/D) contact area
using a sacrificial S/D layer are provided herein. The sacrificial layer, which includes …

Source and drain epitaxy and isolation for gate structures

K Cheng, J Li, P Xu, Z Bi - US Patent 10,985,279, 2021 - Google Patents
Semiconductor devices and methods for forming the semi conductor devices include forming
a sacrificial layer on a substrate on each side of a stack of nanosheets, the stack of …