The microthreaded many-core architecture is comprised of multiple clusters of fine-grained
multi-threaded cores. The management of concurrency is supported in the instruction set …

This article presents MGSim 1, an open source discrete event simulator for on-chip
hardware components developed at the University of Amsterdam. MGSim is used as …

UvA-DARE (Digital Academic Repository) Page 1 UvA-DARE is a service provided by the library
of the University of Amsterdam (https://dare.uva.nl) UvA-DARE (Digital Academic Repository) …

This thesis offers some insight into the automatic parallelization of loops by introducing and
describing a source-to-source parallelizing compiler developed from scratch called …

This article advocates the use of new architectural features commonly found in many-cores
to replace the machine model underlying Unix-like operating systems. We present a general …

As it was stated in the previous chapter, SVP requires a different way of thinking when
describing parallelism to the system through the use of SL. This also means that mapping …

The roots of all evil are the latencies that are statically unpredictable. Dynamic schedule of
operations, constructed on-the-fly in data-driven machines, is needed to overcome them …

As it was stated in the previous chapter, SVP requires a different way of thinking when
describing parallelism to the system through the use of SL. This also means that mapping …