Recent advances in convolutional neural network acceleration

Q Zhang, M Zhang, T Chen, Z Sun, Y Ma, B Yu - Neurocomputing, 2019 - Elsevier
In recent years, convolutional neural networks (CNNs) have shown great performance in
various fields such as image classification, pattern recognition, and multi-media …

A systematic literature review on binary neural networks

R Sayed, H Azmi, H Shawkey, AH Khalil… - IEEE Access, 2023 - ieeexplore.ieee.org
This paper presents an extensive literature review on Binary Neural Network (BNN). BNN
utilizes binary weights and activation function parameters to substitute the full-precision …

An on-chip photonic deep neural network for image classification

F Ashtiani, AJ Geers, F Aflatouni - Nature, 2022 - nature.com
Deep neural networks with applications from computer vision to medical diagnosis,,,–are
commonly implemented using clock-based processors,,,,,,,–, in which computation speed is …

A survey of the recent architectures of deep convolutional neural networks

A Khan, A Sohail, U Zahoora, AS Qureshi - Artificial intelligence review, 2020 - Springer
Abstract Deep Convolutional Neural Network (CNN) is a special type of Neural Networks,
which has shown exemplary performance on several competitions related to Computer …

CONV-SRAM: An energy-efficient SRAM with in-memory dot-product computation for low-power convolutional neural networks

A Biswas, AP Chandrakasan - IEEE Journal of Solid-State …, 2018 - ieeexplore.ieee.org
This paper presents an energy-efficient static random access memory (SRAM) with
embedded dot-product computation capability, for binary-weight convolutional neural …

Hardware implementation of deep network accelerators towards healthcare and biomedical applications

MR Azghadi, C Lammie, JK Eshraghian… - … Circuits and Systems, 2020 - ieeexplore.ieee.org
The advent of dedicated Deep Learning (DL) accelerators and neuromorphic processors
has brought on new opportunities for applying both Deep and Spiking Neural Network …

A twin-8T SRAM computation-in-memory unit-macro for multibit CNN-based AI edge processors

X Si, JJ Chen, YN Tu, WH Huang… - IEEE Journal of Solid …, 2019 - ieeexplore.ieee.org
Computation-in-memory (CIM) is a promising candidate to improve the energy efficiency of
multiply-and-accumulate (MAC) operations of artificial intelligence (AI) chips. This work …

Colonnade: A reconfigurable SRAM-based digital bit-serial compute-in-memory macro for processing neural networks

H Kim, T Yoo, TTH Kim, B Kim - IEEE Journal of Solid-State …, 2021 - ieeexplore.ieee.org
This article (Colonnade) presents a fully digital bit-serial compute-in-memory (CIM) macro.
The digital CIM macro is designed for processing neural networks with reconfigurable 1-16 …

A local computing cell and 6T SRAM-based computing-in-memory macro with 8-b MAC operation for edge AI chips

X Si, YN Tu, WH Huang, JW Su, PJ Lu… - IEEE Journal of Solid …, 2021 - ieeexplore.ieee.org
This article presents a computing-in-memory (CIM) structure aimed at improving the energy
efficiency of edge devices running multi-bit multiply-and-accumulate (MAC) operations. The …

An architecture to accelerate convolution in deep neural networks

A Ardakani, C Condo, M Ahmadi… - IEEE Transactions on …, 2017 - ieeexplore.ieee.org
In the past few years, the demand for real-time hardware implementations of deep neural
networks (DNNs), especially convolutional neural networks (CNNs), has dramatically …