[HTML][HTML] Recent developments in low-power AI accelerators: A survey

C Åleskog, H Grahn, A Borg - Algorithms, 2022 - mdpi.com
As machine learning and AI continue to rapidly develop, and with the ever-closer end of
Moore's law, new avenues and novel ideas in architecture design are being created and …

Sata: Sparsity-aware training accelerator for spiking neural networks

R Yin, A Moitra, A Bhattacharjee, Y Kim… - IEEE Transactions on …, 2022 - ieeexplore.ieee.org
Spiking neural networks (SNNs) have gained huge attention as a potential energy-efficient
alternative to conventional artificial neural networks (ANNs) due to their inherent high …

Optimizing depthwise separable convolution operations on gpus

G Lu, W Zhang, Z Wang - IEEE Transactions on Parallel and …, 2021 - ieeexplore.ieee.org
The depthwise separable convolution is commonly seen in convolutional neural networks
(CNNs), and is widely used to reduce the computation overhead of a standard multi-channel …

Sorting in memristive memory

MR Alam, MH Najafi, N TaheriNejad - ACM Journal on Emerging …, 2022 - dl.acm.org
Sorting data is needed in many application domains. Traditionally, the data is read from
memory and sent to a general-purpose processor or application-specific hardware for …

Cambricon-u: A systolic random increment memory architecture for unary computing

H Guo, Y Zhao, Z Li, Y Hao, C Liu, X Song, X Li… - Proceedings of the 56th …, 2023 - dl.acm.org
Unary computing, whose arithmetics require only one logic gate, has enabled efficient DNN
processing, especially on strictly power-constrained devices. However, unary computing still …

An efficient bicubic interpolation implementation for real-time image processing using hybrid computing

Y Zhu, Y Dai, K Han, J Wang, J Hu - Journal of Real-Time Image …, 2022 - Springer
Bicubic interpolation is a classic algorithm in the real-time image processing systems, which
can achieve good quality at a relatively low hardware cost, and is also the fundamental …

uSystolic: Byte-crawling unary systolic array

D Wu, J San Miguel - 2022 IEEE International Symposium on …, 2022 - ieeexplore.ieee.org
General matrix multiply (GEMM) is an important operation in broad applications, especially
the thriving deep neural networks. To achieve low power consumption for GEMM …

uBrain: A unary brain computer interface

D Wu, J Li, Z Pan, Y Kim, JS Miguel - Proceedings of the 49th Annual …, 2022 - dl.acm.org
Brain computer interfaces (BCIs) have been widely adopted to enhance human perception
via brain signals with abundant spatial-temporal dynamics, such as electroencephalogram …

From Multipliers to Integrators: a Survey of Stochastic Computing Primitives

S Liu, JL Rosselló, S Liu, X Tang… - IEEE Transactions …, 2024 - ieeexplore.ieee.org
Stochastic Computing (SC) has the potential to dramatically improve important nanoscale
circuit metrics, including area and power dissipation, for implementing complex digital …

Hybrid stochastic-binary computing for low-latency and high-precision inference of CNNs

Z Chen, Y Ma, Z Wang - … Transactions on Circuits and Systems I …, 2022 - ieeexplore.ieee.org
The appealing property of low area, low power, and high bit error tolerance has made
Stochastic Computing (SC) a promising alternative to conventional binary arithmetic for …