Method for making group III nitride articles

AD Hanser, L Liu, EA Preble, D Tsvetkov… - US Patent …, 2013 - Google Patents
2009-09-15 Assigned to KYMA TECHNOLOGIES, INC. reassignment KYMA
TECHNOLOGIES, INC. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR …

Single crystal group III nitride articles and method of producing same by HVPE method incorporating a polycrystalline layer for yield enhancement

EA Preble, L Liu, AD Hanser, NM Williams… - US Patent …, 2011 - Google Patents
In a method for making a GaN article, an epitaxial nitride layer is deposited on a single-
crystal Substrate. A 3D nucle ation GaN layer is grown on the epitaxial nitride layer by HVPE …

Semiconductor devices with superlattice layers providing halo implant peak confinement and related methods

RJ Mears, H Takeuchi - US Patent 9,899,479, 2018 - Google Patents
(57) ABSTRACT A semiconductor device may include a semiconductor sub strate, and a
plurality of field effect transistors (FETs) on the semiconductor substrate. Each FET may …

Vertical semiconductor devices including superlattice punch through stop layer and related methods

R Mears, H Takeuchi, E Trautmann - US Patent 9,275,996, 2016 - Google Patents
(57) ABSTRACT A semiconductor device may include a substrate, and a plu rality of fins
spaced apart on the substrate. Each of the fins may include a lower semiconductor fin …

Semiconductor devices with enhanced deterministic doping and related methods

RJ Mears - US Patent 10,170,560, 2019 - Google Patents
(57) ABSTRACT A method for making a semiconductor device may include forming a
plurality of stacked groups of layers on a semi conductor substrate, with each group of layers …

Binary group III-nitride based high electron mobility transistors

AW Saxler - US Patent 7,544,963, 2009 - Google Patents
Binary Group III-nitride high electron mobility transistors (HEMTs) and methods of fabricating
binary Group III-nitride HEMTs are provided. In some embodiments, the binary Group III …

Methods of fabricating transistors including dielectrically-supported gate electrodes

RP Smith, ST Sheppard - US Patent 7,709,269, 2010 - Google Patents
Transistors are fabricated by forming a protective layer hav ing a first opening extending
therethrough on a Substrate, forming a dielectric layer on the protective layer having a …

Semiconductor device including a superlattice and replacement metal gate structure and related methods

RJ Mears, TJK Liu, H Takeuchi - US Patent 10,084,045, 2018 - Google Patents
A semiconductor device may include a substrate having a channel recess therein, a plurality
of spaced apart shallow trench isolation (STI) regions in the substrate, and source and drain …

Semiconductor device including a superlattice and replacement metal gate structure and related methods

RJ Mears, TJK Liu, H Takeuchi - US Patent 9,722,046, 2017 - Google Patents
(57) ABSTRACT A semiconductor device may include a substrate having a channel recess
therein, a plurality of spaced apart shallow trench isolation (STI) regions in the Substrate …

Semiconductor devices including superlattice depletion layer stack and related methods

R Mears, H Takeuchi, E Trautmann - US Patent 9,406,753, 2016 - Google Patents
(57) ABSTRACT A semiconductor device may include an alternating stack of Superlattice
and bulk semiconductor layers on a Substrate, with each Superlattice layer including a …