A survey on optical network-on-chip architectures

S Werner, J Navaridas, M Luján - ACM Computing Surveys (CSUR), 2017 - dl.acm.org
Optical on-chip data transmission enabled by silicon photonics (SiP) is widely considered a
key technology to overcome the bandwidth and energy limitations of electrical interconnects …

A survey of on-chip optical interconnects

J Bashir, E Peter, SR Sarangi - ACM Computing Surveys (CSUR), 2019 - dl.acm.org
Numerous challenges present themselves when scaling traditional on-chip electrical
networks to large manycore processors. Some of these challenges include high latency …

Designing low-power, low-latency networks-on-chip by optimally combining electrical and optical links

S Werner, J Navaridas, M Luján - 2017 IEEE International …, 2017 - ieeexplore.ieee.org
Optical on-chip communication is considered a promising candidate to overcome latency
and energy bottlenecks of electrical interconnects. Although recently proposed hybrid …

Enabling scalable chiplet-based uniform memory architectures with silicon photonics

P Fotouhi, S Werner, J Lowe-Power… - Proceedings of the …, 2019 - dl.acm.org
Chiplet-based systems have recently received much attention for scaling-up processing
power in HPC systems due to their high energy efficiency and low cost manufacturing; …

Security of Electrical, Optical, and Wireless On-chip Interconnects: A Survey

H Weerasena, P Mishra - ACM Transactions on Design Automation of …, 2024 - dl.acm.org
The advancement of manufacturing technologies has enabled the integration of more
intellectual property (IP) cores on the same system-on-chip (SoC). Scalable and high …

Contention-aware routing for thermal-reliable optical networks-on-chip

M Li, W Liu, LHK Duong, P Chen… - IEEE Transactions on …, 2020 - ieeexplore.ieee.org
Optical network-on-chip (ONoC) architecture offers ultrahigh bandwidth, low latency, and
low power dissipation for new-generation manycore systems. However, the benefits in …

Toward a high-performance and low-loss Clos–Benes-based optical network-on-chip architecture

R Yao, Y Ye - IEEE Transactions on Computer-Aided Design of …, 2020 - ieeexplore.ieee.org
As chip multiprocessors (CMPs) keep growing in capability, on-chip communication
efficiency is crucial to the overall performance. However, on-chip networks based on …

Thermal-sensitive design and power optimization for a 3D torus-based optical NoC

K Yao, Y Ye, S Pasricha, J Xu - 2017 IEEE/ACM International …, 2017 - ieeexplore.ieee.org
In order to overcome limitations of traditional electronic interconnects in terms of power
efficiency and bandwidth density, optical networks-on-chip (NoCs) based on 3D integrated …

Predict, share, and recycle your way to low-power nanophotonic networks

J Bashir, SR Sarangi - ACM Journal on Emerging Technologies in …, 2019 - dl.acm.org
High static power consumption is widely regarded as one of the largest bottlenecks in
creating scalable optical NoCs. The standard techniques to reduce static power are based …

Towards efficient on-chip communication: A survey on silicon nanophotonics and optical networks-on-chip

UU Nisa, J Bashir - Journal of Systems Architecture, 2024 - Elsevier
Silicon nanophotonics, with its high-speed, low-loss optical interconnects, and high
computation capabilities, is seen as one of the promising technologies that can easily …