US9035393B2 - Method and apparatus for forming an integrated circuit with a metalized resistor
in a standard cell configuration - Google Patents US9035393B2 - Method and apparatus for …

Silicon interconnect fabric (Si-IF) technology is a PCB replacement, fine pitch
heterogeneous integration platform that enables high package density by supporting dielet …

One embodiment of the present disclosure provides a semi conductor die that includes: a
Substrate, a first layer deposited on the Substrate, and a second layer deposited on the first …

Challenges of electrostatic discharge (ESD) protection in deeply scaled silicon technologies
are addressed by improving design, characterization, and modeling of I/O MOSFETs …

This book presents innovative solutions for the implementation of Sigma-Delta Modulation
(SDM) based Analog-to-Digital Conversion (ADC), required for the next generation of …

Inductive peaking using T-coils has been widely used in broadband I/O interfaces. In this
paper, we analyze technical effects and limitations of the T-coil, and discuss several …

An electric static discharge (ESD) diode pair is disclosed. The first diode of the device
includes a first diode junction portion having vertically orientated and horizontally oriented …

A magneto-resistive (MR) sensor protection circuit is disclosed, for the protection of an MR
sensor. The MR sensor may have a safe operating voltage range, a normal operating …

This paper presents four topologies of voltage‐mode un‐terminated IO cells in 28‐nm
CMOS for single‐ended rail‐to‐rail signaling over a passive interposer die in 2.5 D …

A semiconductor die is described. This semiconductor die includes an electro-static
discharge (ESD) device with a metal component coupled to an input-output (I/O) pad, and …