An aging-resistant RO-PUF for reliable key generation

MT Rahman, F Rahman, D Forte… - IEEE Transactions on …, 2015 - ieeexplore.ieee.org
Physical unclonable functions (PUFs) have emerged as a promising security primitive for
low-cost authentication and cryptographic key generation. However, PUF stability with …

PVT-aware design of dopingless dynamically configurable tunnel FET

A Lahgere, C Sahu, J Singh - IEEE Transactions on Electron …, 2015 - ieeexplore.ieee.org
This paper presents a new design of dopingless dynamically configurable double-gate
tunnel FET (TFET) for process-voltage-temperature (PVT)-aware applications. The …

Self-tuning for maximized lifetime energy-efficiency in the presence of circuit aging

E Mintarno, J Skaf, R Zheng… - … on Computer-Aided …, 2011 - ieeexplore.ieee.org
This paper presents an integrated framework, together with control policies, for optimizing
dynamic control of self-tuning parameters of a digital system over its lifetime in the presence …

Recycled IC detection based on statistical methods

K Huang, Y Liu, N Korolija, JM Carulli… - IEEE transactions on …, 2015 - ieeexplore.ieee.org
We introduce two statistical methods for identifying recycled integrated circuits (ICs) through
the use of one-class classifiers and degradation curve sensitivity analysis. Both methods rely …

Estimation and compensation of process-induced variations in nanoscale tunnel field-effect transistors for improved reliability

S Saurabh, MJ Kumar - IEEE Transactions on Device and …, 2010 - ieeexplore.ieee.org
Tunnel field-effect transistors (TFETs) have extremely low leakage current, exhibit excellent
subthreshold swing, and are less susceptible to short-channel effects. However, TFETs do …

Lifetime reliability enhancement of microprocessors: Mitigating the impact of negative bias temperature instability

H Hong, J Lim, H Lim, S Kang - ACM Computing Surveys (CSUR), 2015 - dl.acm.org
Ensuring lifetime reliability of microprocessors has become more critical. Continuous scaling
and increasing temperatures due to growing power density are threatening lifetime …

Magic: Malicious aging in circuits/cores

N Karimi, AK Kanuparthi, X Wang… - ACM Transactions on …, 2015 - dl.acm.org
The performance of an IC degrades over its lifetime, ultimately resulting in IC failure. In this
article, we present a hardware attack (called MAGIC) to maliciously accelerate NBTI aging …

Real-time prediction for IC aging based on machine learning

K Huang, X Zhang, N Karimi - IEEE Transactions on …, 2019 - ieeexplore.ieee.org
Estimating the aging-related degradation and failure of nanoscale integrated circuits (ICs),
before they actually occur, is crucial for developing aging prevention/mitigation actions and …

Contemporary CMOS aging mitigation techniques: Survey, taxonomy, and methods

N Khoshavi, RA Ashraf, RF DeMara, S Kiamehr… - Integration, 2017 - Elsevier
The proposed paper addresses the overarching reliability issue of transistor aging in
nanometer-scaled circuits. Specifically, a comprehensive survey and taxonomy of …

Use it or lose it: Wear-out and lifetime in future chip multiprocessors

H Kim, A Vitkovskiy, PV Gratz, V Soteriou - … of the 46th Annual IEEE/ACM …, 2013 - dl.acm.org
Moore's Law scaling is continuing to yield even higher transistor density with each
succeeding process generation, leading to today's multi-core Chip Multi-Processors (CMPs) …