Photon counting detectors for X-ray imaging with emphasis on CT

R Ballabriga, J Alozy, FN Bandi… - … on Radiation and …, 2020 - ieeexplore.ieee.org
X-ray imaging is a widely used imaging modality in the medical diagnostic field due to its
availability, low cost, high spatial resolution, and fast image acquisition. X-ray photons in …

Single Photon Counting Readout IC With 44 e rms ENC and 5.5 e rms Offset Spread With Charge Sensitive Amplifier Active Feedback Discharge

R Kleczek, P Kmon, P Maj, R Szczygiel… - … on Circuits and …, 2023 - ieeexplore.ieee.org
The paper presents the design and measurements of a low noise integrated circuit in a
CMOS 130 nm for the readout of a hybrid pixel detector operating in a single photon …

Sphird–single photon counting pixel readout asic with pulse pile-up compensation methods

P Grybos, R Kleczek, P Kmon… - … on Circuits and …, 2023 - ieeexplore.ieee.org
This brief presents the design and measurement results of a prototype SPHIRD-1 ASIC in
the CMOS 40 nm process. The chip is dedicated to high count rate single photon counting …

Very high rate X-ray photon counting 2D detectors with small pixels: the SPHIRD project

D Magalhães, P Fajardo, P Grybos… - 2022 IEEE Nuclear …, 2022 - ieeexplore.ieee.org
The SPHIRD project is a study towards the development of a new generation of X-ray
photon counting pixel detectors for synchrotron radiation applications operating between 10 …

A low-power, high-speed readout for pixel detectors based on an arbitration tree

F Fahim, S Joshi, S Ogrenci-Memik… - IEEE Transactions on …, 2019 - ieeexplore.ieee.org
In this article, a low-power, high-speed arbitration tree for pixel detector readout is
presented. The synchronized, binary tree priority encoder establishes a position-dependent …

Recording channel design for time-based measurements in 28 nm CMOS

LA Kadlubowski, P Kmon - Journal of Instrumentation, 2023 - iopscience.iop.org
In this paper we present a recording stage dedicated to time-based measurements required
in imaging detectors. The prototype ASIC is manufactured in the 28 nm CMOS process and …

A multi-channel low-noise analog front end circuit for linear LADAR

P Wang, M Ye, X Xia, X Zheng, Y Li… - IEEE Transactions on …, 2019 - ieeexplore.ieee.org
In this brief, a 32-channel analog front end circuit featured with high gain, high bandwidth,
and low noise characteristics is designed. The proposed three-stage analog front end (TS …

Spectrum1k—integrated circuit for medical imaging designed in CMOS 40 nm

P Kmon, R Szczygieł, R Kłeczek, D Górni… - Journal of …, 2022 - iopscience.iop.org
We present a multichannel integrated circuit of pixel architecture designed in CMOS 40 nm
technology. The chip is composed of 40× 24 pixels of 75 µm pitch working in the single …

Pixel readout IC for CdTe detectors operating in single photon counting mode with interpixel communication

P Grybos, R Kleczek, P Kmon… - Journal of …, 2022 - iopscience.iop.org
This paper presents a readout integrated circuit (IC) of pixel architecture called MPIX
(Multithreshold PIXels), designed for CdTe pixel detectors used in X-ray imaging …

Vernier time-to-digital converter with ring oscillators for in-pixel time-of-arrival and time-over-threshold measurement in 28 nm CMOS

LA Kadlubowski, P Kmon - Journal of Instrumentation, 2021 - iopscience.iop.org
The paper describes a design of a prototype chip in 28 nm CMOS technology, consisting of
8× 4 pixels with 50 μm pitch, dedicated for the precise measurement of Time-of-Arrival (ToA) …