A low-power comparator is presented. pMOS transistors are used at the input of the
preamplifier of the comparator as well as the latch stage. Both stages are controlled by a …

In recent years, implantable biomedical devices like cardiac pacemaker, defibrillators,
cochlear implants, visual prosthesis etc. have gained immense importance in the personal …

A low-power high-speed two-stage dynamic comparator is presented. In this circuit, the
voltage swing of the first stage of the comparator, pre-amplifier stage, is limited to Vdd/2 in …

Security and energy-consumptiont are two conflicting challenges in the design and
operation of the smart cities that use Internet-of-Things (IoT). Providing power to IoT things …

In this paper, an ultra high speed dynamic comparator is presented. The PMOS pass
transistors are used in the latch and pre-amplifier stage of the comparator. At the …

A novel approach is proposed and discussed for designing CMOS double-tail dynamic
comparator using the bulk-driven method. The bulk-driven method proposed thus far for low …

In this paper, a low-power method for double-tail comparators is introduced. Using the
proposed method, the power consumption of the pre-amplifier which is the dominant part is …

This paper presents a low voltage double-tail dynamic comparator (DTDC) for fast and
power-efficient data conversion. The amplification stage of the proposed DTDC is designed …

In this paper, a modified successive-approximation-register analog-to-digital converter (SAR
ADC) with a novel low power dynamic comparator at 0.2 V supply voltage is presented. The …

Most of the real world signals have analog behavior. In order to convert these analog signals
to digital, we need an analog to digital converter (ADC). In the architecture of ADC's …