A high performance binary to BCD converter for decimal multiplication

J Bhattacharya, A Gupta, A Singh - Proceedings of 2010 …, 2010 - ieeexplore.ieee.org
Decimal data processing applications have grown exponentially in recent years thereby
increasing the need to have hardware support for decimal arithmetic. Binary to BCD …

Fast and compact binary-to-BCD conversion circuits for decimal multiplication

O Al-Khaleel, Z Al-Qudah, M Al-Khaleel… - 2011 IEEE 29th …, 2011 - ieeexplore.ieee.org
Decimal arithmetic has received considerable attention recently due to its suitability for many
financial and commercial applications. In particular, numerous algorithms have been …

Improved designs of digit-by-digit decimal multiplier

SE Ahmed, S Varma, MB Srinivas - Integration, 2018 - Elsevier
Decimal multiplication is a ubiquitous operation which is inherently complex in terms of
partial product generation and accumulation. In this paper, the authors propose a …

Fast architecture for decimal digit multiplication

M Fazlali, H Valikhani, S Timarchi, HT Malazi - Microprocessors and …, 2015 - Elsevier
BCD digit multiplication module (BDM) is widely used in BCD arithmetic, especially in
Decimal Floating-Point (DFP) units. In this paper, we present a new BCD digit multiplication …

Sign-magnitude encoding for efficient VLSI realization of decimal multiplication

S Gorgin, G Jaberipur - IEEE Transactions on Very Large Scale …, 2016 - ieeexplore.ieee.org
Decimal X× Y multiplication is a complex operation, where intermediate partial products
(IPPs) are commonly selected from a set of precomputed radix-10 X multiples. Some works …

A new area-efficient BCD-digit multiplier

E Castillo, A Lloris, DP Morales, L Parrilla… - Digital Signal …, 2017 - Elsevier
Abstract In the Internet of Things era, with millions of devices performing financial and
commercial operations, decimal arithmetic has become very popular in the computation of …

High performance Vedic BCD multiplier and modified binary to BCD converter

AK Mehta, M Gupta, V Jain… - 2013 Annual IEEE India …, 2013 - ieeexplore.ieee.org
Decimal data processing applications have grown exponentially in recent years and the
IEEE 754-2008 standard for floating point arithmetic has already dictated the importance of …

Efficient ASIC and FPGA implementation of binary-coded decimal digit multipliers

S Gorgin, G Jaberipur, R Hashemi Asl - Circuits, Systems, and Signal …, 2014 - Springer
Partial product generation (PPG), in radix-10 multiplication hardware, is often done through
selection of pre-computed decimal multiples of the multiplicand. However, ASIC and FPGA …

Design of high speed vedic multiplier for decimal number system

P Saha, A Banerjee, A Dandapat… - Progress in VLSI Design …, 2012 - Springer
Vedic mathematics is the ancient techniques of mathematics, based on 16 simple sutras
(formulae). Decimal number system multiplication technique based on such ancient …

Dpd/bcd to bid converters

AA Ayoub, HAH Fahmy, T Eldeeb - US Patent 9,143,159, 2015 - Google Patents
BACKGROUND Decimalarithmetic has a growing need in many commer cial applications,
financial applications, green energy appli cations, billing applications, and database …