Recent developments and design challenges of high-performance ring oscillator CMOS time-to-digital converters
Time-to-digital converters (TDCs) are increasingly used as building blocks in biomedical
imaging, digital communication, and measurement instrumentation systems. When …
imaging, digital communication, and measurement instrumentation systems. When …
[HTML][HTML] Time-to-digital conversion techniques: A survey of recent developments
J Szyduczyński, D Kościelnik, M Miśkowicz - Measurement, 2023 - Elsevier
Time-to-digital converters (TDCs) are key components of time-mode circuits and enablers for
digital processing of analog signals encoded in time. Since design of time-mode circuits …
digital processing of analog signals encoded in time. Since design of time-mode circuits …
Multi-channel FPGA time-to-digital converter with 10 ps bin and 40 ps FWHM
D Portaluppi, K Pasquinelli, I Cusini… - IEEE Transactions on …, 2022 - ieeexplore.ieee.org
We present a novel architecture for multi-channel time-to-digital converters (TDCs) to be
implemented into low-cost field-programmable gate arrays (FPGAs), achieving 10-ps least …
implemented into low-cost field-programmable gate arrays (FPGAs), achieving 10-ps least …
CMOS time-to-digital converters for biomedical imaging applications
Time-to-digital converters (TDCs) are high-performance mixed-signal circuits capable of
timestamping events with sub-gate delay resolution. As a result of their high-performance, in …
timestamping events with sub-gate delay resolution. As a result of their high-performance, in …
Time‐to‐digital converters—A comprehensive review
MP Mattada, H Guhilot - International Journal of Circuit Theory …, 2021 - Wiley Online Library
This work presents a comprehensive literature review on different topologies of time‐to‐
digital converters (TDCs). A brief history, applications, classification, characterization, and …
digital converters (TDCs). A brief history, applications, classification, characterization, and …
A reusable code-based SAR ADC design with CDAC compiler and synthesizable analog building blocks
This brief proposes a code-reusable design methodology for synthesizable successive
approximation register (SAR) ADCs based on the digital design flow to significantly reduce …
approximation register (SAR) ADCs based on the digital design flow to significantly reduce …
A Reconfigurable Vernier Time-to-Digital Converter With 2-D Spiral Comparator Array and Second-Order Linearization
This paper presents an 8-bit 1.25-ps resolution reconfigurable Vernier time-to-digital
converter (TDC) with a 2-D spiral comparator array and ΔΣ modulators for linearization. The …
converter (TDC) with a 2-D spiral comparator array and ΔΣ modulators for linearization. The …
A single-channel voltage-scalable 8-GS/s 8-b> 37.5-dB SNDR time-domain ADC with asynchronous pipeline successive approximation in 28-nm CMOS
This article presents a single-channel voltage-scalable 8-GS/s 8-b time-domain analog-to-
digital-converter (TD-ADC). It breaks the speed limit of traditional TD-ADC by leveraging …
digital-converter (TD-ADC). It breaks the speed limit of traditional TD-ADC by leveraging …
A fully synthesized 77-dB SFDR reprogrammable SRMC filter using digital standard cells
This paper presents a fully synthesized 0.4-V analog biquad filter in a 0.13-μm CMOS
technology using digital standard cells. In contrast to a custom-designed inverter-based …
technology using digital standard cells. In contrast to a custom-designed inverter-based …
A 14-Bit, 1-ps resolution, two-step ring and 2D Vernier TDC in 130nm CMOS technology
H Wang, FF Dai - ESSCIRC 2017-43rd IEEE European Solid …, 2017 - ieeexplore.ieee.org
This paper presents a time-to-digital (TDC) design with large detectable range and fine
resolution, combining a ring TDC with a 2-dimentional (2D) Vernier TDC. The detectable …
resolution, combining a ring TDC with a 2-dimentional (2D) Vernier TDC. The detectable …