Spectral-based convolutional neural network without multiple spatial-frequency domain switchings

SO Ayat, M Khalil-Hani, AAH Ab Rahman, H Abdellatef - Neurocomputing, 2019 - Elsevier
Recent researches have shown that spectral representation provides a significant speed-up
in the massive computation workload of convolution operations in the inference (feed …

Exploration of OpenCL for FPGAs using SDAccel and comparison to GPUs and multicore CPUs

L Kalms, D Göhringer - 2017 27th International Conference on …, 2017 - ieeexplore.ieee.org
Due to energy efficiency, heterogeneous computing is gaining more and more attention.
Since FPGA implementations are time consuming, high-level synthesis (HLS) is used to …

Optimized implementation of OpenCL kernels on FPGAs

K Shata, MK Elteir, AA El-Zoghabi - Journal of Systems Architecture, 2019 - Elsevier
Abstract Recently Field-Programmable Gate Array (FPGA) vendors, such as Altera and
Xilinx released an Open Computing Language Software Development Kit (OpenCL SDK) …

Implementation of sobel edge detection on FPGA based on OpenCL

B You, W Sheng, H Ma, Y Gu… - 2017 IEEE 7th Annual …, 2017 - ieeexplore.ieee.org
In this paper, Sobel edge detection is implemented on an FPGA using a DEl-SoC
development board from TERASIC. OpenCL as a new scheme is used for implementation …

Methods and Algorithms for Efficient Programming of FPGA-based Heterogeneous Systems for Object Detection

L Kalms - 2023 - tud.qucosa.de
Abstract (EN) Nowadays, there is a high demand for computer vision applications in
numerous application areas, such as autonomous driving or unmanned aerial vehicles …

Design space exploration of embedded applications on heterogeneous cpu-gpu platforms

A Siddiqui, GN Khan - 2019 International Conference on High …, 2019 - ieeexplore.ieee.org
CPU-GPU platforms possess the potential of enhancing the performance of applications
through some unique and diverse capabilities of both CPU-GPU devices. As a result, the …

Hardware software co-design based CPU-FPGA architecture: Overview and evaluation

S Agharass, M Laaboubi, A Saddik… - … Conference on Digital …, 2021 - ieeexplore.ieee.org
Hardware/software co-design (HSCD) is an essential part of the configuration flow of current
electronic system-level (ESL) devices [1]. This paper shows an overview of the …

The review of heterogeneous design frameworks/Platforms for digital systems embedded in FPGAs and SoCs

A Alali, H Elmaaradi, M Khaldoun… - Indonesian Journal of …, 2021 - section.iaesonline.com
Abstract Systems-on-a-chip integrate specialized modules to provide well-defined
functionality. In order to guarantee its efficiency, designersare careful to choose high-level …

Implementation and optimisation of pulse compression algorithm on open CL‐based FPGA

Y Feng, S Hu, X Li, J Yu - The Journal of Engineering, 2019 - Wiley Online Library
As Moore's law meets bottlenecks, the demand for heterogeneous parallel processing
systems is increasing. Field‐programmable gate arrays (FPGAs) are becoming more …

Fpga-Accelerated Image Processing Using High Level Synthesis with Opencl

J Isaksson - 2017 - diva-portal.org
Abstract High Level Synthesis (HLS) is a new method for developing applications for use on
FPGAs. Instead of the classic approach using a Hardware Descriptive Language (HDL), a …