Results from the coldflux superconductor integrated circuit design tool project

CJ Fourie, K Jackman, J Delport… - IEEE Transactions …, 2023 - ieeexplore.ieee.org
In five and a half years, the ColdFlux project under the IARPA SuperTools program pushed
the boundaries of digital and analog superconductor electronic design automation (S-EDA) …

Methods for testing path delay and static faults in RSFQ circuits

M Li, F Wang, S Gupta - 2022 IEEE 40th VLSI Test Symposium …, 2022 - ieeexplore.ieee.org
Superconducting electronics (SCE), especially Rapid Single Flux Quantum (RSFQ) logic, is
being developed due to its high-performance and low power. In [1][2], we developed new …

Design for testability (dft) for rsfq circuits

M Li, Y Lin, S Gupta - 2023 IEEE 41st VLSI Test Symposium …, 2023 - ieeexplore.ieee.org
Superconducting electronics (SCE), especially Rapid Single Flux Quantum (RSFQ) logic, is
being developed due to its high-performance and low power. In [1]–[3], we developed new …

An effective and efficient automatic test pattern generation (atpg) paradigm for certifying performance of rsfq circuits

F Wang, SK Gupta - IEEE Transactions on Applied …, 2020 - ieeexplore.ieee.org
Rapid single flux quantum (RSFQ) logic, based on Josephson junctions (JJs), is seeing a
resurgence as a way for providing high performance in the era beyond the end of physical …

Built in self test (BIST) for RSFQ circuits

M Li, Y Lin, S Gupta - 2024 IEEE 42nd VLSI Test Symposium …, 2024 - ieeexplore.ieee.org
In the era beyond the end of physical scaling of CMOS, growing attention is being paid to
Superconducting electronics (SCE), especially Rapid Single Flux Quantum (RSFQ) logic …

Data-driven fault model development for superconducting logic

M Li, F Wang, S Gupta - 2020 IEEE International Test …, 2020 - ieeexplore.ieee.org
Superconducting technology is being seriously explored for certain applications. We
propose a new clean-slate method to derive fault models from large numbers of simulation …

Static timing analysis (sta) with timing bleed: Certifying much higher performance for rapid single flux quantum (rsfq) logic

F Wang, B Zhang, M Pedram… - Journal of Physics …, 2020 - iopscience.iop.org
Static Timing Analysis (STA) with Timing Bleed: Certifying Much Higher Performance for
Rapid Single Flux Quantum (RSFQ) Logic Page 1 Journal of Physics: Conference Series …

[PDF][PDF] Results from the ColdFlux Superconductor Integrated Circuit Design Tool Project

P Beerel, S Gupta, H Zha, S Razmkhah… - researchgate.net
In five and a half years, the ColdFlux project under the IARPA SuperTools program pushed
the boundaries of digital and analog superconductor electronic design automation (S-EDA) …

Verification and Testing of Rapid Single-Flux-Quantum (RSFQ) Circuit for Certifying Logical Correctness and Performance

F Wang - 2020 - search.proquest.com
Verification and Testing of Rapid Single-Flux-Quantum (RSFQ) Circuit for Certifying Logical
Correctness and Performance by Fangz Page 1 Verification and Testing of Rapid Single-Flux-Quantum …

単一磁束量子論理回路の故障診断のためのタイミング故障シミュレーションの高速化

渡邊裕生 - mie-u.repo.nii.ac.jp
半導体回路に代わる高速・低消費電力の論理回路として, 近年単一磁束量子回路 (RSFQ)
論理回路の研究が活発に行われている. 将来的に半導体集積回路と同様に大規模化が見込まれて …