The state-of-the-art CMOS technology has started to adopt three-dimensional (3D)
integration approaches, enabling continuous chip density increment and performance …

UV nanosecond pulsed laser annealing (UV-NLA) is demonstrating clear benefits in the
emerging 3D-integrated electronic devices, where the allowed thermal budget is strictly …

The relaxation mechanism of Si 1-x Ge x/Si heterostructures subjected to pulsed laser
melting was investigated by probing the pulsed laser induced epitaxy (PLIE) regime of …

In advanced logic devices, access resistance to transistors is dominated by metal–
semiconductor contact resistivity. Recent studies report values below 1× 10− 9 ohm cm 2 …

This work reports on low temperature epitaxial growth solutions for the processing of
advanced CMOS devices beyond the 3 nm technological node. The complex stacking of …

Lowering the contact resistivity at the metal/semiconductor interface is a necessary
requirement in the development of next-generation p-type metal-oxide-semiconductor logic …

UV nanosecond pulsed laser annealing (UV-NLA) is demonstrating clear benefits in the
emerging 3D-integrated electronic devices, where the allowed thermal budget is strictly …

The elastic response of monolayer silicon-germanium alloys (Si 1-x Ge x, 0≤ x≤ 1) is
investigated using first-principles calculations. It is found that the atomic arrangement of …

The impact of solidification front velocity (SFV) on dopant segregation and activation
surpassing the equilibrium solid solubility limit was investigated in high Ge content SiGe …

This chapter is dedicated to detailed introduction of principles and fundamentals of defect
engineering and successful realization of this strategy in various nanoscale semiconductor …