Abstract Field-Programmable Gate Arrays (FPGAs) have become one of the key digital
circuit implementation media over the last decade. A crucial part of their creation lies in their …

We use a fully timing-driven experimental flow [4][15] in which a set of benchmark circuits
are synthesized into different cluster-based [2][3][15] logic block architectures, which contain …

Field-Programmable Gate Arrays (FPGAs) have emerged as an attractive means of
implementing logic circuits, providing instant manufacturing turnaround and negligible …

A survey of field-programmable gate array (FPGA) architectures and the programming
technologies used to customize them is presented. Programming technologies are …

While modern FPGAs often contain clusters of 4-input lookup tables and flip flops, little is
known about good choices for two key architectural parameters: the number of these basic …

(57) ABSTRACT A particular embodiment of the present invention provides a shared-LUT
logic circuit that provides the functionality of two (n+ 1) LUT logic circuits without requiring …

A logic element includes memory elements, multiplexers, 5,260,610 A 11/1993 Pedersen et
al. and controls. The multiplexers are arranged in levels includ 5, 260611 A 11/1993 Cliff et …

This paper evaluates an architecture that implements a hierarchical routing structure for
FPGAs, called a hierarchical FPGA (HFPGA). A set of new tools has been used to place and …

This paper presents a new Field‐Programmable Gate Array (FPGA) architecture which
reduces the density gap between FPGAs and Mask‐Programmed Gate Arrays (MPGAs) for …

FPLD architectures are often designed based on the results of experiments with\typical"
benchmark circuits. For very large FPLDs, it may be di cult to obtain enough benchmark …