Preprocessing in SAT solving

A Biere, M Järvisalo, B Kiesl - Handbook of Satisfiability, 2021 - ebooks.iospress.nl
Preprocessing has become a key component of the Boolean satisfiability (SAT) solving
workflow. In practice, preprocessing is situated between the encoding phase and the solving …

More Scalable LTL Model Checking via Discovering Design-Space Dependencies ()

R Dureja, KY Rozier - International Conference on Tools and Algorithms …, 2018 - Springer
Modern system design often requires comparing several models over a large design space.
Different models arise out of a need to weigh different design choices, to check core …

On-the-fly decomposition of specifications in software model checking

S Apel, D Beyer, V Mordan, V Mutilin… - Proceedings of the 2016 …, 2016 - dl.acm.org
Major breakthroughs have increased the efficiency and effectiveness of software model
checking considerably, such that this technology is now applicable to industrial-scale …

Applying SMT in symbolic execution of microcode

A Franzén, A Cimatti, A Nadel… - Formal Methods in …, 2010 - ieeexplore.ieee.org
Microcode is a critical component in modern microprocessors, and substantial effort has
been devoted in the past to verify its correctness. A prominent approach, based on symbolic …

Directed test generation for validation of multicore architectures

X Qin, P Mishra - ACM Transactions on Design Automation of Electronic …, 2012 - dl.acm.org
Functional validation is widely acknowledged as a major challenge for multicore
architectures. Directed tests are promising since a significantly smaller number of directed …

Optimized model checking of multiple properties

G Cabodi, S Nocco - 2011 Design, Automation & Test in …, 2011 - ieeexplore.ieee.org
This paper addresses the problem of model checking multiple properties on the same
circuit/system. Although this is a typical scenario in several industrial verification frameworks …

Incremental verification with mode variable invariants in state machines

T Kahsai, PL Garoche, C Tinelli, M Whalen - … , Norfolk, VA, USA, April 3-5 …, 2012 - Springer
We describe two complementary techniques to aid the automatic verification of safety
properties of synchronous systems by model checking. A first technique allows the automatic …

Synchronized generation of directed tests using satisfiability solving

X Qin, M Chen, P Mishra - 2010 23rd International Conference …, 2010 - ieeexplore.ieee.org
Directed test generation is important for the functional verification of complex system-on-chip
designs. SAT based bounded model checking is promising for counter example generation …

[PDF][PDF] Accelerating parallel verification via complementary property partitioning and strategy exploration

R Dureja, J Baumgartner, R Kanzelman… - # …, 2020 - library.oapen.org
Industrial hardware verification tasks often require checking a large number of properties
within a testbench. Verification tools often utilize parallelism in their solving orchestration to …

To split or to group: from divide-and-conquer to sub-task sharing for verifying multiple properties in model checking

G Cabodi, PE Camurati, C Loiacono, M Palena… - International Journal on …, 2018 - Springer
Hardware systems complexity has constantly increased in recent years. Guaranteeing their
correctness is a must. Formal verification techniques, such as model checking, now play a …