Risc-v instruction set architecture extensions: A survey
E Cui, T Li, Q Wei - IEEE Access, 2023 - ieeexplore.ieee.org
RISC-V is an open-source and royalty-free instruction set architecture (ISA), which opens up
a new era of processor innovation. RISC-V has the characteristics of modularization and …
a new era of processor innovation. RISC-V has the characteristics of modularization and …
Shedding light on static partitioning hypervisors for Arm-based mixed-criticality systems
In this paper, we aim to understand the properties and guarantees of static partitioning
hypervisors (SPH) for Arm-based mixed-criticality systems (MCS). To this end, we performed …
hypervisors (SPH) for Arm-based mixed-criticality systems (MCS). To this end, we performed …
Designing a 6G testbed for location: Use cases, challenges, enablers and Requirements
Location will have a central role in Research and Development (R&D) towards 6G networks,
both as a service offered by the network (improving the current offering of 5G) and as an …
both as a service offered by the network (improving the current offering of 5G) and as an …
{MorFuzz}: Fuzzing processor via runtime instruction morphing enhanced synchronizable co-simulation
Modern processors are too complex to be bug free. Recently, a few hardware fuzzing
techniques have shown promising results in verifying processor designs. However, due to …
techniques have shown promising results in verifying processor designs. However, due to …
[HTML][HTML] Testing the limits of general-purpose hypervisors for real-time control systems
With the emergence of the Industry 4.0 paradigm, there is a need to introduce a significant
degree of flexibility, security and resilience in automation infrastructures, while keeping up …
degree of flexibility, security and resilience in automation infrastructures, while keeping up …
uTango: an open-source TEE for IoT devices
Security is one of the main challenges of the Internet of Things (IoT). IoT devices are mainly
powered by low-cost microcontrollers (MCUs) that typically lack basic hardware security …
powered by low-cost microcontrollers (MCUs) that typically lack basic hardware security …
CVA6 RISC-V virtualization: Architecture, microarchitecture, and design space exploration
Virtualization is a key technology used in a wide range of applications, from cloud computing
to embedded systems. Over the last few years, mainstream computer architectures were …
to embedded systems. Over the last few years, mainstream computer architectures were …
Unleashing OpenTitan's Potential: a Silicon-Ready Embedded Secure Element for Root of Trust and Cryptographic Offloading
The rapid advancement and exploration of open-hardware RISC-V platforms are catalyzing
substantial changes across critical sectors, including autonomous vehicles, smart-city …
substantial changes across critical sectors, including autonomous vehicles, smart-city …
Static hardware partitioning on RISC-V: Shortcomings, limitations, and prospects
R Ramsauer, S Huber, K Schwarz… - 2022 IEEE 8th World …, 2022 - ieeexplore.ieee.org
On embedded processors that are increasingly equipped with multiple CPU cores, static
hardware partitioning is an established means of consolidating and isolating workloads onto …
hardware partitioning is an established means of consolidating and isolating workloads onto …
ChamelIoT: a tightly-and loosely-coupled hardware-assisted OS framework for low-end IoT devices
M Silva, T Gomes, M Ekpanyapong, A Tavares… - Real-Time …, 2024 - Springer
Abstract The evergrowing Internet of Things (IoT) ecosystem continues to impose new
requirements and constraints on every device. At the edge, low-end devices are getting …
requirements and constraints on every device. At the edge, low-end devices are getting …