Hardware implementation of deep network accelerators towards healthcare and biomedical applications

MR Azghadi, C Lammie, JK Eshraghian… - … Circuits and Systems, 2020 - ieeexplore.ieee.org
The advent of dedicated Deep Learning (DL) accelerators and neuromorphic processors
has brought on new opportunities for applying both Deep and Spiking Neural Network …

Resource-constrained machine learning for ADAS: A systematic review

J Borrego-Carazo, D Castells-Rufas, E Biempica… - IEEE …, 2020 - ieeexplore.ieee.org
The advent of machine learning (ML) methods for the industry has opened new possibilities
in the automotive domain, especially for Advanced Driver Assistance Systems (ADAS) …

Optimizing the Deep Neural Networks by Layer‐Wise Refined Pruning and the Acceleration on FPGA

H Li, X Yue, Z Wang, Z Chai, W Wang… - Computational …, 2022 - Wiley Online Library
To accelerate the practical applications of artificial intelligence, this paper proposes a high
efficient layer‐wise refined pruning method for deep neural networks at the software level …

CNN2Gate: An implementation of convolutional neural networks inference on FPGAs with automated design space exploration

A Ghaffari, Y Savaria - Electronics, 2020 - mdpi.com
Convolutional Neural Networks (CNNs) have a major impact on our society, because of the
numerous services they provide. These services include, but are not limited to image …

Toward multi-fpga acceleration of the neural networks

S Biookaghazadeh, PK Ravi, M Zhao - ACM Journal on Emerging …, 2021 - dl.acm.org
High-throughput and low-latency Convolutional Neural Network (CNN) inference is
increasingly important for many cloud-and edge-computing applications. FPGA-based …

[HTML][HTML] Deepedgesoc: End-to-end deep learning framework for edge iot devices

MR Al Koutayni, G Reis, D Stricker - Internet of Things, 2023 - Elsevier
The acceleration of deep neural networks (DNNs) on edge devices is gaining significant
importance in various application domains. General purpose graphics processing units …

A dedicated hardware accelerator for real-time acceleration of YOLOv2

K Xu, X Wang, X Liu, C Cao, H Li, H Peng… - Journal of Real-Time …, 2021 - Springer
In recent years, dedicated hardware accelerators for the acceleration of the convolutional
neural network (CNN) have been extensively studied. Although many studies have …

A review of in-memory computing for machine learning: architectures, options

V Snasel, TK Dang, J Kueng, L Kong - International Journal of Web …, 2023 - emerald.com
Purpose This paper aims to review in-memory computing (IMC) for machine learning (ML)
applications from history, architectures and options aspects. In this review, the authors …

Blastfunction: A full-stack framework bringing fpga hardware acceleration to cloud-native applications

A Damiani, G Fiscaletti, M Bacis, R Brondolin… - ACM Transactions on …, 2022 - dl.acm.org
“Cloud-native” is the umbrella adjective describing the standard approach for developing
applications that exploit cloud infrastructures' scalability and elasticity at their best. As the …

BlastFunction: an FPGA-as-a-service system for accelerated serverless computing

M Bacis, R Brondolin… - … Design, Automation & …, 2020 - ieeexplore.ieee.org
Heterogeneous computing platforms are now a valuable solution to continue to meet
Service Level Agreements (SLAs) for compute intensive cloud workloads. Field …