Impact of high-k gate dielectric on analog and RF performance of nanoscale DG-MOSFET
Now a days, high-k dielectrics have been investigated as an alternative to Silicon dioxide
(SiO 2) based gate dielectric for nanoscale semiconductor devices. This paper is an attempt …
(SiO 2) based gate dielectric for nanoscale semiconductor devices. This paper is an attempt …
Influence of gate and channel engineering on multigate MOSFETs-A review
R Ramesh - Microelectronics journal, 2017 - Elsevier
The design of CMOS circuits using nanoscale MOSFET has become very difficult nowadays
as device modeling faces new challenges such as short channel effects and mobility …
as device modeling faces new challenges such as short channel effects and mobility …
Temperature analysis of a dopingless TFET considering interface trap charges for enhanced reliability
The dopingless tunnel field-effect transistors (DLTFETs) are captivating researchers over
conventional TFETs as the former eliminates fabrication-related challenges such as random …
conventional TFETs as the former eliminates fabrication-related challenges such as random …
Dopingless tunnel field-effect transistor with oversized back gate: proposal and investigation
MA Raushan, N Alam - IEEE Transactions on Electron …, 2018 - ieeexplore.ieee.org
Tunnel field-effect transistors (TFETs) have shown attractive device performance making
them a potential candidate to replace MOSFETs in future technologies. However, the …
them a potential candidate to replace MOSFETs in future technologies. However, the …
Symmetric operation in an extended back gate JLFET for scaling to the 5-nm regime considering quantum confinement effects
In this paper, we propose a double gate junctionless FET (DGJLFET) with an extended back
gate (EBG) architecture for significantly improved performance in the sub-10-nm regime …
gate (EBG) architecture for significantly improved performance in the sub-10-nm regime …
Partially extended germanium source DG-TFET: design, analysis, and optimization for enhanced digital and analog/RF parameters
Tunnel field-effect transistors have demonstrated a predominant performance in the field of
semiconductors. However, low drive current and ambipolarity are major challenges for …
semiconductors. However, low drive current and ambipolarity are major challenges for …
Evaluation of sensitivity in a vertically misaligned double-gate electrolyte-insulator-semiconductor extended source tunnel FET as pH sensor
MH Khan, MFP Mohamed, MF Akbar, G Wadhwa… - Micro and …, 2024 - Elsevier
In this research, the primary objective is to investigate the impact of vertical gate
misalignment on the source and drain regions of 30 nm. The double-gate Electrolyte …
misalignment on the source and drain regions of 30 nm. The double-gate Electrolyte …
Wigner function approach
The Wigner function formalism has been introduced with an emphasis on basic theoretical
aspects, and recently developed numerical approaches and applications for modeling and …
aspects, and recently developed numerical approaches and applications for modeling and …
Retention and scalability perspective of sub-100-nm double gate tunnel FET DRAM
N Navlakha, JT Lin, A Kranti - IEEE Transactions on Electron …, 2017 - ieeexplore.ieee.org
This paper reports on the design optimization of double gate (DG) tunnel FET (TFET) for
dynamic memory applications in sub-100-nm regime. It is shown that incorporation of lateral …
dynamic memory applications in sub-100-nm regime. It is shown that incorporation of lateral …