The only book on integrated circuits for optical communications that fully covers High-Speed
IOs, PLLs, CDRs, and transceiver design including optical communication The increasing …

We present a 4-Gb/s I/O circuit that fits in 0.1-mm/sup 2/of die area, dissipates 90 mW of
power, and operates over 1 m of 7-mil 0.5-oz PCB trace in a 0.25-/spl mu/m CMOS …

Phase-locked loops have been used for a wide range of applications from synthesizing a
desired phase or frequency to recovering the phase and frequency of an input signal. Delay …

An 8-Gb/s 0.3-/spl mu/m CMOS transceiver uses multilevel signaling (4-PAM) and transmit
preshaping in combination with receive equalization to reduce intersymbol interference due …

The present invention provides a chipset for transferring data through an electromagnetically
coupled bus system. The chipset includes a modulator, a matching circuit and a …

Interconnects have been shown to be a dominant source of energy consumption in modern
day System-on-Chip (SoC) designs. With a large (and growing) number of electronic …

Current-mode circuits, where information is represented by the branch currents of the circuits
rather than the nodal voltages as of voltage-mode circuits, possess many unique and …

A serial link transmitter fabricated in a large-scale integrated 0.4-/spl mu/m CMOS process
uses multilevel signaling (4-PBM) and a three-tap pre-emphasis filter to reduce intersymbol …

Presented in this paper are: 1) information-theoretic lower bounds on energy consumption of
noisy digital gates and 2) the concept of noise tolerance via coding for achieving energy …

A new method for deriving an equation for the oscillation frequency of a ring oscillator is
proposed. The method is general enough to be used for a variety of types of delay stages …