Autockt: Deep reinforcement learning of analog circuit designs

K Settaluri, A Haj-Ali, Q Huang… - … , Automation & Test …, 2020 - ieeexplore.ieee.org
Domain specialization under energy constraints in deeply-scaled CMOS has been driving
the need for agile development of Systems on a Chip (SoCs). While digital subsystems have …

Challenges and opportunities toward fully automated analog layout design

H Chen, M Liu, X Tang, K Zhu, N Sun… - Journal of …, 2020 - iopscience.iop.org
Realizing the layouts of analog/mixed-signal (AMS) integrated circuits (ICs) is a complicated
task due to the high design flexibility and sensitive circuit performance. Compared with the …

LAYGO: A template-and-grid-based layout generation engine for advanced CMOS technologies

J Han, W Bae, E Chang, Z Wang… - IEEE Transactions on …, 2021 - ieeexplore.ieee.org
LAYout with Gridded Objects (LAYGO), a Python-based layout-generation engine for
enhancing the design productivity of custom circuit layouts in advanced CMOS processes, is …

LAYGEN II—Automatic layout generation of analog integrated circuits

R Martins, N Lourenco, N Horta - IEEE Transactions on …, 2013 - ieeexplore.ieee.org
This paper describes an innovative design automation tool, LAYGEN II, for analog integrated
circuit (IC) layout generation based on template descriptions and on evolutionary …

Automated design of analog circuits using reinforcement learning

K Settaluri, Z Liu, R Khurana, A Mirhaj… - … on Computer-Aided …, 2021 - ieeexplore.ieee.org
Analog and mixed-signal (AMS) blocks are often a crucial and time-consuming part of
System-on-Chip (SoC) design, primarily due to a manual circuit and layout iterations …

Analog Integrated Circuit Routing Techniques: An Extensive Review

RMF Martins, NCC Lourenço - IEEE Access, 2023 - ieeexplore.ieee.org
Routing techniques for analog and radio-frequency (A/RF) integrated circuit (IC) design
automation have been proposed in the literature for over three decades. On those, an …

Constraint-based layout-driven sizing of analog circuits

H Habal, H Graeb - … Transactions on Computer-Aided Design of …, 2011 - ieeexplore.ieee.org
A flow is presented for the automatic synthesis of an analog circuit layout based on a
schematic and a list of circuit design parameter values. The flow is driven by design …

LAYGO2: A custom layout generation engine based on dynamic templates and grids for advanced CMOS technologies

T Shin, D Lee, D Kim, G Sung, W Shin… - … on Computer-Aided …, 2023 - ieeexplore.ieee.org
This article presents an automatic layout generation framework in advanced CMOS
technologies. The framework extends the template-and-grid-based layout generation …

AIDA: Layout-aware analog circuit-level sizing with in-loop layout generation

N Lourenço, R Martins, A Canelas, R Povoa, N Horta - Integration, 2016 - Elsevier
This paper presents AIDA, an analog integrated circuit design automation environment,
which implements a design flow from a circuit-level specification to physical layout …

[图书][B] Automatic analog IC sizing and optimization constrained with PVT corners and layout effects

N Lourenço, R Martins, N Horta - 2017 - Springer
Over the past few decades, very large scale integration technologies have been widely
improved, allowing the proliferation of consumer electronics and enabling the steady growth …