Minimizing energy consumption for frame-based tasks on heterogeneous multiprocessor platforms
Heterogeneous multiprocessors have been widely used in modern computational systems
to increase the computing capability. As the performance increases, the energy consumption …
to increase the computing capability. As the performance increases, the energy consumption …
Energy optimization of streaming applications in IoT on NoC based heterogeneous MPSoCs using re-timing and DVFS
The Multiprocessor System-on-Chip (MPSoC) computing architectures are widely adopted
in modern embedded systems for real-time applications due to their high performance …
in modern embedded systems for real-time applications due to their high performance …
Energy-efficient task allocation techniques for asymmetric multiprocessor embedded systems
Asymmetric multiprocessor systems are considered power-efficient multiprocessor
architectures. Furthermore, efficient task allocation (partitioning) can achieve more energy …
architectures. Furthermore, efficient task allocation (partitioning) can achieve more energy …
Choice of efficient simulator tool for wireless sensor networks
The wireless sensor networks are experiencing an extraordinary rise which is reflected by
their omnipresence in various fields of application. They offer numerous challenges ranging …
their omnipresence in various fields of application. They offer numerous challenges ranging …
Network on chip and parallel computing in embedded systems
D Belkacemi, Y Bouchebaba, M Daoui… - 2016 IEEE 10th …, 2016 - ieeexplore.ieee.org
In order to cope with the increasing application requirements, heterogeneous MPSoC are
considered as the major solution of future embedded systems thanks to their advantages in …
considered as the major solution of future embedded systems thanks to their advantages in …
Cross-architecture prediction based scheduling for energy efficient execution on single-ISA heterogeneous chip-multiprocessors
In recent years, single-ISA heterogeneous chip multiprocessors (CMP) consisting of big high-
performance cores and small power-saving cores on the same die have been proposed for …
performance cores and small power-saving cores on the same die have been proposed for …
Simulation of efficient real-time scheduling and power optimisation
R Cheour, R Urunuela, Y Trinquet… - International Journal of …, 2013 - hal.science
Sophisticated applications turn out to be executed upon more than one CPU for practical
and economic reasons. Due to advances in circuit technology and performance limitation …
and economic reasons. Due to advances in circuit technology and performance limitation …
在異質多核心平台的省電排程
李翔昕 - 2016 - tdr.lib.ntu.edu.tw
在計算平台的最新發展趨勢從同質多核心架構轉移到異構和非對稱多核心架構. 因此,
新的非對稱多核心平台變成一個重要的議題. 然而, 大多數現有的排程器著重在如何區分合適的 …
新的非對稱多核心平台變成一個重要的議題. 然而, 大多數現有的排程器著重在如何區分合適的 …
Optimization of hybrid parallel application execution in heterogeneous high performance computing systems considering execution time and power consumption
P Rościszewski - arXiv preprint arXiv:1809.07611, 2018 - arxiv.org
Many important computational problems require utilization of high performance computing
(HPC) systems that consist of multi-level structures combining higher and higher numbers of …
(HPC) systems that consist of multi-level structures combining higher and higher numbers of …
An energy-efficient scheduler for throughput guaranteed jobs on asymmetric multi-core platforms
A recent trend in computing platforms is moving from homogeneous multi-core architectures
toward heterogeneous and asymmetric multi-core. Therefore, the design of new schedulers …
toward heterogeneous and asymmetric multi-core. Therefore, the design of new schedulers …