Fetch directed instruction prefetching

G Reinman, B Calder, T Austin - … of the 32nd Annual ACM/IEEE …, 1999 - ieeexplore.ieee.org
Instruction supply is a crucial component of processor performance. Instruction prefetching
has been proposed as a mechanism to help reduce instruction cache misses, which in turn …

Analysis of the o-geometric history length branch predictor

A Seznec - … Symposium on Computer Architecture (ISCA'05), 2005 - ieeexplore.ieee.org
In this paper, we introduce and analyze the Optimized GEometric History Length (O-GEHL)
branch Predictor that efficiently exploits very long global histories in the 100-200 bits range …

[PDF][PDF] The impact of delay on the design of branch predictors

DA Jiménez, SW Keckler, C Lin - Proceedings of the 33rd annual ACM …, 2000 - dl.acm.org
Modern microprocessors employ increasingly complicated branch predictors to achieve
instruction fetch bandwidth that is sufficient for wide out-of-order execution cores. While …

Twig: Profile-guided btb prefetching for data center applications

TA Khan, N Brown, A Sriraman… - MICRO-54: 54th Annual …, 2021 - dl.acm.org
Modern data center applications have deep software stacks, with instruction footprints that
are orders of magnitude larger than typical instruction cache (I-cache) sizes. To efficiently …

Re-establishing fetch-directed instruction prefetching: An industry perspective

Y Ishii, J Lee, K Nathella… - 2021 IEEE International …, 2021 - ieeexplore.ieee.org
Instruction prefetching can play a pivotal role in improving the performance of workloads
with large instruction footprints and frequent, costly frontend stalls. In particular, Fetch …

Thermometer: profile-guided btb replacement for data center applications

S Song, TA Khan, SM Shahri, A Sriraman… - Proceedings of the 49th …, 2022 - dl.acm.org
Modern processors employ a decoupled frontend with Fetch Directed Instruction Prefetching
(FDIP) to avoid frontend stalls in data center applications. However, the large branch …

Whisper: Profile-guided branch misprediction elimination for data center applications

TA Khan, M Ugur, K Nathella, D Sunwoo… - 2022 55th IEEE/ACM …, 2022 - ieeexplore.ieee.org
Modern data center applications experience frequent branch mispredictions–degrading
performance, increasing cost, and reducing energy efficiency in data centers. Even the state …

[图书][B] The computer engineering handbook

VG Oklobdzija - 2001 - taylorfrancis.com
There is arguably no field in greater need of a comprehensive handbook than computer
engineering. The unparalleled rate of technological advancement, the explosion of …

Confluence: unified instruction supply for scale-out servers

C Kaynak, B Grot, B Falsafi - … of the 48th International Symposium on …, 2015 - dl.acm.org
Multi-megabyte instruction working sets of server workloads defy the capacities of latency-
critical instruction-supply components of a core; the instruction cache (L1-I) and the branch …

A storage-effective BTB organization for servers

T Asheim, B Grot, R Kumar - 2023 IEEE International …, 2023 - ieeexplore.ieee.org
Many contemporary applications feature multi-megabyte instruction footprints that
overwhelm the capacity of branch target buffers (BTB) and instruction caches (L1-I), causing …